Hello,
We've a custom board with RT1176 MCU. For the SDRAM we are using EM638165BM-5IH from EtronTech which is 4M x 16-bit SDRAM. To test the SDRAM, we are using an example project from the RT1170 EVK board SDK cm7_semc example source code to initiate SDRAM. We have made the below changes for the initialization of semc for our SDRAM:
Below, we have not changed the timing settings, only the size, port size, and DQS mode changed w.r.t original project.
status_t BOARD_InitSEMC(void)
{
semc_config_t config;
semc_sdram_config_t sdramconfig;
uint32_t clockFrq = EXAMPLE_SEMC_CLK_FREQ;
/* Initializes the MAC configure structure to zero. */
memset(&config, 0, sizeof(semc_config_t));
memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));
/* Initialize SEMC. */
SEMC_GetDefaultConfig(&config);
config.dqsMode = kSEMC_Loopbackinternal; /* For more accurate timing. */
SEMC_Init(SEMC, &config);
/* Configure SDRAM. */
sdramconfig.csxPinMux = kSEMC_MUXCSX0;
sdramconfig.address = 0x80000000;
sdramconfig.memsize_kbytes = 2 * 4 * 1024; /* 64MB = 2*32*1024*1KBytes*/
sdramconfig.portSize = kSEMC_PortSize16Bit; /*two 16-bit SDRAMs make up 32-bit portsize*/
sdramconfig.burstLen = kSEMC_Sdram_BurstLen8;
sdramconfig.columnAddrBitNum = kSEMC_SdramColunm_9bit;
sdramconfig.casLatency = kSEMC_LatencyThree;
sdramconfig.tPrecharge2Act_Ns = 15; /* tRP 15ns */
sdramconfig.tAct2ReadWrite_Ns = 15; /* tRCD 15ns */
sdramconfig.tRefreshRecovery_Ns = 70; /* Use the maximum of the (Trfc , Txsr). */
sdramconfig.tWriteRecovery_Ns = 2; /* tWR 2ns */
sdramconfig.tCkeOff_Ns =
42; /* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/
sdramconfig.tAct2Prechage_Ns = 40; /* tRAS 40ns */
sdramconfig.tSelfRefRecovery_Ns = 70;
sdramconfig.tRefresh2Refresh_Ns = 60;
sdramconfig.tAct2Act_Ns = 2; /* tRC/tRDD 2ns */
sdramconfig.tPrescalePeriod_Ns = 160 * (1000000000 / clockFrq);
sdramconfig.refreshPeriod_nsPerRow = 8 * 1000000 / 8192; /* 64ms/8192 */
sdramconfig.refreshUrgThreshold = sdramconfig.refreshPeriod_nsPerRow;
sdramconfig.refreshBurstLen = 1;
sdramconfig.delayChain = 6; /* For all tempeatures. */
return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq);
}
As for our questions,
1- When we run the code, read-write for 32 bits at both 59MHz and 198Mhz fails, after some time it overwrites on the same area on the SDRAM when storing indexes, but when we store a single value for each index, test successes. Why is that?
sdram_writeBuffer[index] = index; //original code, storing index
sdram_writeBuffer[index] = 5; //successing code, storing single value
void SEMC_SDRAMReadWrite32Bit(void)
{
uint32_t index;
uint32_t datalen = SEMC_EXAMPLE_DATALEN;
uint32_t *sdram = (uint32_t *)EXAMPLE_SEMC_START_ADDRESS; /* SDRAM start address. */
bool result = true;
// PRINTF("\r\n SEMC SDRAM Memory 32 bit Write Start, Start Address 0x%x, Data Length %d !\r\n", sdram, datalen);
/* Prepare data and write to SDRAM. */
for (index = 0; index < datalen; index++)
{
sdram_writeBuffer[index] = 5;
sdram[index] = sdram_writeBuffer[index];
if (sdram_writeBuffer[index] != sdram[index])
{
result = false;
break;
}
}
// PRINTF("\r\n SEMC SDRAM Read 32 bit Data Start, Start Address 0x%x, Data Length %d !\r\n", sdram, datalen);
#if defined(CACHE_MAINTAIN) && CACHE_MAINTAIN
DCACHE_InvalidateByRange(EXAMPLE_SEMC_START_ADDRESS, 4U * SEMC_EXAMPLE_DATALEN);
#endif
/* Read data from the SDRAM. */
for (index = 0; index < datalen; index++)
{
sdram_readBuffer[index] = sdram[index];
}
// PRINTF("\r\n SEMC SDRAM 32 bit Data Write and Read Compare Start!\r\n");
/* Compare the two buffers. */
while (datalen--)
{
if (sdram_writeBuffer[datalen] != sdram_readBuffer[datalen])
{
result = false;
break;
}
}
if (!result)
{
PRINTF("\r\n SEMC SDRAM 32 bit Data Write and Read Compare Failed!\r\n");
}
else
{
PRINTF("\r\n SEMC SDRAM 32 bit Data Write and Read Compare Succeed!\r\n");
}
}
2- Why does dqs.Mode affects our outcome even though our layout is the same as EVK, On EVK dqs.Mode is config.dqsMode = kSEMC_Loopbackdqspad; but when we set dqs.Mode to kSEMC_Loopbackdqspad example project read-write test fails even for the single value case.
3- For the timing parameters, how should we adjust them, on the datasheet of EM638165BM-5IH, things are not clear enough so that we can use the values given on the datasheet. Can you give any advice?
Thank you in advance!
Best Regards,
