RT1172 NAND flash memory FlexSPI SDK example

AndreiZi · ‎04-11-2024

Hello,

Can NXP provide FlexSPI NAND polling/interrupt transfer cm7 SDK code example?

We are using i.MXRT1172 on the custom board.

Connected to FLEXSPI2, PORT A.

Best regards,

Andrei

AndreiZi

Dear Gavin,

Thank you for your response. Here are our project details:

For our development purpose we need FlexSPI NAND polling/interrupt transfer cm7 code example.

Currently we are on stage of our board bring up procedure.

We have a data flash memory: W25N512GVEIG in our board we need to read/write access for our application. NOT for the boot,

I have the W25N512GV NAND flash memory from Winbond connected by QSPI to FlexSPI2 interface, pins GPIO_EMC_B2_09 - GPIO_EMC_B2_16.

I defined the pins in *.mex file:

- pin_list:
- pinItem: {pin_num: K5, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_EMC_B2_13}
- pinItem: {pin_num: R2, peripheral: FLEXSPI2, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_EMC_B2_10}
- pinItem: {pin_num: M4, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_EMC_B2_14}
- pinItem: {pin_num: L2, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_EMC_B2_15}
- pinItem: {pin_num: P2, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_EMC_B2_16}
- pinItem: {pin_num: L4, peripheral: FLEXSPI2, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_EMC_B2_11}

Please see attached full project.

I cannot see any signals go out from MCU on FlexSPI2 interface. Probably I configured something wrong.

Waiting for you suggestions.

King regards,

Andrei Zinenko

Gavin_Jia

Hi @AndreiZi ,

Thanks for your kind patience!

I helped you review the code and found that in the pin configuration, the IOMUXC_SetPinConfig function is not called for the flexspi2 related pins, is it because of this problem that your flexspi2 peripheral is not initialized properly? Otherwise, it's unlikely that you can't monitor any signals here.

You can refer to the implementation in the sdk to configure this part and try again.

Best regards,
Gavin

AndreiZi

Hi Gavin_Jia ,

I checked your proposition. Indeed, some initialization was not executed. Strange, the only difference from SDK example to my project was Pdrv Config (in my project it was High Driver in SDK example it is Normal Driver). I changed it to Normal Driver and initialization lines appeared in pin_mux.c code. See attached lines below. But it did not change the thing: I still get 7002 statuses on each access to SpiFlex functions and see no signal on Scope on SCK, Data or CS pins. I attach here the whole project code; in case you have ability to run it on your side.

 IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_10_FLEXSPI2_A_SCLK,  /* GPIO_EMC_B2_10 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */
  IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_11_FLEXSPI2_A_SS0_B,  /* GPIO_EMC_B2_11 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */
  IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_13_FLEXSPI2_A_DATA00,  /* GPIO_EMC_B2_13 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */
  IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_14_FLEXSPI2_A_DATA01,  /* GPIO_EMC_B2_14 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */
  IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_15_FLEXSPI2_A_DATA02,  /* GPIO_EMC_B2_15 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */
  IOMUXC_SetPinConfig(
      IOMUXC_GPIO_EMC_B2_16_FLEXSPI2_A_DATA03,  /* GPIO_EMC_B2_16 PAD functional properties : */
      0x0AU);                                 /* PDRV Field: normal drive strength
                                                 Pull Down Pull Up Field: Internal pulldown resistor enabled
                                                 Open Drain Field: Disabled
                                                 Domain write protection: Both cores are allowed
                                                 Domain write protection lock: Neither of DWP bits is locked */

Waiting for your suggestions,

Kind regards,

Andrei

AndreiZi

I still have no solution to this issue, Can you please provide some support and explanations?

Gavin_Jia · ‎04-12-2024

Hi @AndreiZi ,

Thanks for your interest in NXP MIMXRT series!

About the nand flash drivers/code, as the EVK don't contains the nand flash, so the flexSPI driver didn't add the nandflash code or examples.
But don't worry, you can check this SDK code:
SDK_Root\boards\evkmimxrt1170\bootloader_examples\flashloader
We can find some driver: flexspi_nand_flash.c and flexspi_nand_flash.h, it may be a reference for you.

Best regards,
Gavin

AndreiZi · ‎04-15-2024

Hi Gavin_Jia,

Thank for your response. I actually took a nor_flash example and tried to run it on my custom board.

I have the W25N512GV NAND NAND flash memory from Winbond connected by QSPI to FlexSPI2 interface, pins GPIO_EMC_B2_09 - GPIO_EMC_B2_16.

I defined the pins in *.mex file:

- pin_list:
- pinItem: {pin_num: K5, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_EMC_B2_13}
- pinItem: {pin_num: R2, peripheral: FLEXSPI2, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_EMC_B2_10}
- pinItem: {pin_num: M4, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_EMC_B2_14}
- pinItem: {pin_num: L2, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_EMC_B2_15}
- pinItem: {pin_num: P2, peripheral: FLEXSPI2, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_EMC_B2_16}
- pinItem: {pin_num: L4, peripheral: FLEXSPI2, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_EMC_B2_11, pull_down_pull_up_config: Pull_Down}

The interface is initialized :

void BOARD_InitPeripherals(void)

{

/* Initialize components */



 FLEXSPI2_init();

}

And I try to read the memory ID by in the loop:

status = DFLASH_INTF_get_vendor_id(DATA_FLASH_FLEXSPI, vendorID);

status_t DFLASH_INTF_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId)

{

uint32_t temp;

flexspi_transfer_t flashXfer;

 flashXfer.deviceAddress = 0;

 flashXfer.port = DATA_FLASH_PORT;

 flashXfer.cmdType = kFLEXSPI_Read;

 flashXfer.SeqNumber = 1;

 flashXfer.seqIndex = NAND_CMD_LUT_SEQ_IDX_READID;

 flashXfer.data = &temp;

 flashXfer.dataSize = 1;



status_t status = FLEXSPI_TransferBlocking(base, &flashXfer);



 *vendorId = temp;



/* Do software reset or clear AHB buffer directly. */

#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) && defined(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK) && \

 defined(FLEXSPI_AHBCR_CLRAHBTXBUF_MASK)

 base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK;

 base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK);

#else

 FLEXSPI_SoftwareReset(base);

#endif



return status;

}

But always get status 0x7002 (error)

I tried to put the scope on lines clock or data but there is no signals there.

What is wrong?

P.S. I would attach the entire code but cannot find this option in the interface

AndreiZi

Gavin_Jia

Hi @AndreiZi ,

I apologize for my late reply, there was some other content that clogged this thread. Thank you in advance for your understanding.

Could you help me try to add a minimal project using the functionality in the pic? to help us be able to reproduce your issue over here and move forward with issue localization.

Best regards,
Gavin