Is it safe to adjust the RT1176 audio PLL denominator on-the-fly?

[mttjcksn]

Hi all, 

I have an RT1176 application that needs to output audio through the SAI and adjust the audio clock on-the-fly at regular intervals (~8kHz) to keep the system synchronised with another device.

Clocking from the audio PLL and adjusting the audio PLL denominator as below seems to work fine without disturbing the I2S output:

ANATOP_AI_Write(kAI_Itf_Audio, kAI_PLLAUDIO_CTRL3, pllValue);

In the reference manual (P.1421), regarding the audio/video PLLs, it states:

They do not require exact/constant frequency, and can be changed as a part of dynamic frequency scaling procedure

However

on P.1422 it says:

Note that the PFD not only enables faster frequency changes than a PLL, but also allows the configuration to be safely changed "on-the-fly" without going through the output clock disabling/enabling process.

And Figure 14-8 on page 1423 shows the audio PLL as not having a PFD.

Can NXP please confirm if it is safe to adjust the audio PLL on-the-fly with the ANATOP API as I have shown above, or if I would need to drive the audio clock with one of the SYS PLLs with a PFD?

Many thanks,

Matt

[mttjcksn]

Thanks for the quick reply Daniel. 

Yes, in my basic tests of capturing SAI output with a logic analyser and adjusting the audio PLL with ANATOP_AI_Write(kAI_Itf_Audio, kAI_PLLAUDIO_CTRL3, pllValue), I see the clocks change within 48kHz 1 frame and without any problematic artefacts. I want to know if I got lucky, or if this is a totally valid use of the hardware.

Presumably, if the Audio PLL is re-initialised or disabled at all, this will disturb the audio output? Given that we need to do this ~8000 per second, it needs to be a method that is within spec and well tested.

I will investigate the SYS_PLL PFDs too, but would be good to get a firm answer on this before we commit to hardware designs.

Many thanks,

Matt

[DanielRuvalcaba]

The information I have is the one I already shared with you.

In case you prefer, I can try to ask internally for a more accurate reply.

Please let me know what you think.

Regards,

Daniel.

[mttjcksn]

Hi Daniel,
Yes please, it's important for us to to have a definitive answer on this.

Thanks, Matt

[DanielRuvalcaba]

Hi,

Sorry for the late response.

Could you please give us more information about your application, setup and requirements to need change the PLL frequency on the fly?

Could you also share how you are configuring the SAI module?

The SAI module provide configurations to share MCLK, SYNC and BCLK for data synchronization. Have you already took a look to this?

Regards,

Daniel.

[mttjcksn]

Hi Daniel, 

The application is an AVB endpoint, concerned with sending and receiving audio over a LAN, where the audio sent/received by the SAI must be synchronised with a clock source elsewhere on the network.

To do this, the application timing is driven by the audio PLL. We measure FS clock intervals using a timer capture and compare the time with timestamps received from the network. We continuously calculate an offset and adjust our system time by the required amount by adjusting the PLL.  This adjustment happens 8000 times per second.

The SAI can be configured any number of ways depending on the required audio output, that's not really important, but we must be able to continuously adjust the clock source.

Does that answer your questions?

[DanielRuvalcaba]

I’m sorry for the late response.

After discussing with the internal team, the best option to change the frequency on-the-fly would be to use one of the system PLL PFDs.

Regards,

Daniel.

[DanielRuvalcaba]

I'm already checking this internally.

I will get back if more information is needed or if I got an update.

Regards,

Daniel.

[DanielRuvalcaba]

Hi,

Could you please confirm the following?

You are able to change the Audio PLL frequency on the run using this ANATOP_AI_Write(kAI_Itf_Audio, kAI_PLLAUDIO_CTRL3, pllValue), and it is working on your side. You just want to be sure that this is safe procedure.

If the above is correct, I have also tried some USB audio examples that uses the Audio PLL like dev_audio_speaker_bm_cm7, and I tried modifying the Audio PLL frequency on the fly and it is working on my side. I tried this by using CLOCK_DeinitAudioPll() and CLOCK_InitAudioPll(). This is not tested by QA since as per my understanding, we don’t have SDK examples that shows this exactly.

Regarding your question on page 1422 statement. What I understand is that to safely change the Audio PLL frequency on the fly, we might need to reinitialize (disabling/enabling process) the PLL configuration with the new frequency.

Regards,

Daniel.