DTCM ITCM OCRAM and scatter file on IMX RT1052

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DTCM ITCM OCRAM and scatter file on IMX RT1052

Contributor I

Dear All,

I would like to configure at the beginning of my software ITCM 8 Pages, DTCMM 6 pages and OCRAM 2 Pages, so I called the function : FLEXRAM_AllocateRam(&ramAllocate); which is the part of fsl_flexram.c. I defined in the scatter file .scf of KEIL the corresponding regions used :

#define mram_start 0x00000000 // ITCM definition
#define mram_size 0x00040000

#define mram_start1 0x20000000 // DTCM definition
#define mram_size1 0x00030000

#define mram_start2 0x20200000 // OCRAM definition
#define mram_size2 0x00010000

RW_RAM (mram_start) (mram_size ) ;


RW_RAM1 (mram_start1) (mram_size1) ;

     .ANY (+RW +ZI)

in some unit I declared:

volatile uint8_t MyArray[0x30000] __attribute__((section("LONGBUFFER"))) __attribute__ ((aligned(64)));

during linking I got the following message :

MIMXRT1052xxxxx_flexspi_nor_xip_scf(125): warning: L6329W: Pattern *(LONGBUFFER) only matches removed unused sections.

So this is normal since the bank memory definitions (ITCM,DTCM,OCRAM) is done when software started, so how to tell the linker the memory will be usable later ?

Or maybe I missed somethings ?



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NXP TechSupport
NXP TechSupport

Hi David

regarding "how to tell the linker the memory will be usable later ",

discussed in AN 12077 Using the i.MX RT FlexRAM :

As shown in Table 1, there is no valid FlexRAM configuration available in the fuse default setting aligned with the configuration required by this use case. The static configuration cannot be utilized here. However, it is possible to configure the FlexRAM by the run-time configuration approach defined in Section 2.1, “FlexRAM configuration”.


For software example one can look at flexram ram allocate example included in  SDK for EVK-MIMXRT1050


Best regards
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