About Power Up/Down delay time on the RT1050

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About Power Up/Down delay time on the RT1050

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deega_jung
Contributor III

Hello,

Could let me know what is minimum delay times between VDD_SNVS_IN and VDD_HIGH_IN and DCDC_IN?
According to datasheet, reference manual and hardware development guide, "VDD_SNVS_IN supply must be turned on before any other power supply or be connected (shorted) with VDD_HIGH_IN supply", but it has not description between VDD_HIGH_IN and DCDC_IN, and if we use different power source between VDD_SNVS_IN and DCDC_IN.
Please let me know each of the minimum delay times.

Thanks,

Deega

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jingpan
NXP TechSupport
NXP TechSupport

Hi @deega_jung ,

There isn't minimum delay requirement between VDD_HIGH_IN and DCDC_IN. In some simplified design, the power pin can be connected together.

jingpan_0-1627978841323.png

PSWITCH is the most important. Please refer to the hardware development guide, MIMXRT105060HDUG.pdf.

 

Regards,

Jing

  

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jingpan
NXP TechSupport
NXP TechSupport

Hi @deega_jung ,

There isn't minimum delay requirement between VDD_HIGH_IN and DCDC_IN. In some simplified design, the power pin can be connected together.

jingpan_0-1627978841323.png

PSWITCH is the most important. Please refer to the hardware development guide, MIMXRT105060HDUG.pdf.

 

Regards,

Jing

  

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ThomasSC
Contributor III

Hi Jing,

how does this simplified design meet the conditions for DCDC_PSWITCH?

Is the simplified design also useable if SNVS_IN is additional powered by a battery?

Regards,

Thomas

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deega_jung
Contributor III

Hi Jing,

Thank you for your reply. It helped me a lot.

Thanks,

Deega

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