IC does not work when VDD_SNVS uses a Backup supply

[JoshuaG1]

Hi,  

I have a custom board that uses the MIMXRT1171 IC. The system is powered using a 12V supply, which sources other supplies to domains on the device including the 3V3 for the MIMXRT1171, and a coin cell to power the SNVS backup domain as shown in the reference manual (Page 1434). 

The IC works when VDD_SNVS_IN is connected to the main 3V3 supply, shared with DCDC_IN and LSPR_IN as stated in the Datasheet (Page 36).  

When the IC is powered with the VDD_SNVS_IN backup supply first and then the 3V3 supply, the IC does not boot nor is contactable over JTAG. 

The IMXRT can be recovered from this state by driving ONOFF to ground for 5 seconds and then toggling it again. However a pull to ground of POR does not have the same effect.  

Is there something I have missed in the board design? (Related section schematics shown below) The board design matches the reference manual sections 25.5.1 (Page 2117) and the image shown above.  

[lucas_cao]

POR pin cannot be a wakeup source when the system under SNVS mode.

When the system under SNVS mode, the wake up resource can be : wake up pin, onoff button, RTC. 

[JoshuaG1]

Hi Lucas and Paul,

RE: POR pin cannot be a wakeup source when the system under SNVS mode.

I am not in SNVS mode, The backup supply is there to power the GPIOs and RTC when the main supply is off. This issue is that when I turn the main supply ON, with the backup supply already ON, the IMX chip does not boot, and the code does not run. I mentioned my findings of how POR effected the chips functions purely for possible aid into what the problem is.

If I used just the main supply to power everything including the SNVS block, then the IMX chip boots normally.. This however does not allow me to use the backup domain functionality I require.

RE: You could check the MIMXRT1170HDUG Hardware Development Guide for the MIMXRT1160/1170 Processor and the MIMXRT1170 EVK Board Hardware User's Guide (Documentation), and the MIMXRT1170 EVK Design Files (go to Design Resources) to guide you with your design. 

The reference board does not use the SNVS connected to a backup supply. It is connected to the main power supply. Our board works in this mode, but does not provide the features we need. We have designed the board with this in mind, but there is no support of this feature.

[RaRo]

Hello @JoshuaG1,

Even though, the reference board does not use the SNVS connected to a backup supply, the schematic shows the following connection to VDD_SNVS_IN that may be useful to look at:

[MIMXRT1170-EVK Schematic. MIMXRT1170 PART1 (p6)]

As the schematic shows, it could be necessary to add a Schottky Diode between the 3V3 source from the LDO and the Coin Cell. You could download the EVK Design files here.

Best regards, Raul.

[RaRo]

Hello @JoshuaG1,

• However a pull to ground of POR does not have the same effect

i.MX RT1170 Processor Reference Manual Chapter 25. System Reset Controller (SRC) Section 25.3.4. Reset behavior of the Power-on Reset mentions the following:

[About the Reset behavior between POR and SNVS]

• Is there something I have missed in the board design?

You could check the MIMXRT1170HDUG Hardware Development Guide for the MIMXRT1160/1170 Processor and the MIMXRT1170 EVK Board Hardware User's Guide (Documentation), and the MIMXRT1170 EVK Design Files (go to Design Resources) to guide you with your design. You could download them here.

Comparing the EVK with your design you have a different hardware in LDO regulators section and POR pin. The EVK have the following hardware:

[MIMXRT1170-EVK Schematic. MIMXRT1170 PART1 (p6)]

Best regards, Raul.