imx8 UUU

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imx8 UUU

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gravity_one
Contributor III

hi,

modiy SCFW&uboot(include/config/imx8qxq_mek.h)  DDR 3GB-->2GB

use download 2GB.bin to 3GBDDR board,is ok,  uboot startup is 2GB.

but download 2GB.bin to 2GBDDR board,is erro,

D:\v1_UUU>uuu -V -b qspi imx-boot-800-es2-c0-fspi.bin
uuu (Universal Update Utility) for nxp imx chips -- libuuu_1.3.191-0-g4fe24b9

Build in config:
        Pctl     Chip            Vid     Pid     BcdVersion
        ==================================================
        SDPS:    MX8QXP          0x1fc9  0x012f  [0x0002..0xffff]
        SDPS:    MX8QM           0x1fc9  0x0129  [0x0002..0xffff]
        SDPS:    MX8DXL          0x1fc9  0x0147
        SDPS:    MX28            0x15a2  0x004f
        SDPS:    MX815           0x1fc9  0x013e
        SDPS:    MX865           0x1fc9  0x0146
        SDP:     MX7D            0x15a2  0x0076
        SDP:     MX6Q            0x15a2  0x0054
        SDP:     MX6D            0x15a2  0x0061
        SDP:     MX6SL           0x15a2  0x0063
        SDP:     MX6SX           0x15a2  0x0071
        SDP:     MX6UL           0x15a2  0x007d
        SDP:     MX6ULL          0x15a2  0x0080
        SDP:     MX6SLL          0x1fc9  0x0128
        SDP:     MX7ULP          0x1fc9  0x0126
        SDP:     MXRT106X        0x1fc9  0x0135
        SDP:     MX8MM           0x1fc9  0x0134
        SDP:     MX8MQ           0x1fc9  0x012b
        SDPU:    SPL             0x0525  0xb4a4  [0x0000..0x04ff]
        SDPV:    SPL1            0x0525  0xb4a4  [0x0500..0x9998]
        SDPU:    SPL             0x0525  0xb4a4  [0x9999..0x9999]
        SDPU:    SPL             0x3016  0x1001  [0x0000..0x04ff]
        SDPV:    SPL1            0x3016  0x1001  [0x0500..0x9998]
        FBK:                     0x066f  0x9afe
        FBK:                     0x066f  0x9bff
        FB:                      0x0525  0xa4a5
        FB:                      0x18d1  0x0d02
        FB:                      0x3016  0x0001

Run built-in script:

uuu_version 1.2.39

# <li-user uid="40832" login="imx"></li-user>-boot-800-es2-c0-fspi.bin            | bootloader
# <li-user uid="40832" login="imx"></li-user>-boot-800-es2-c0-fspi.bin   [imx-boot-800-es2-c0-fspi.bin] | image burn to flexspi, default is the same as bootloader

# This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ
SDP: boot -f imx-boot-800-es2-c0-fspi.bin

# This command will be run when ROM support stream mode
# i.MX8QXP, i.MX8QM, skip QSPI header
SDPS: boot -f imx-boot-800-es2-c0-fspi.bin -skipfhdr

# These commands will be run when use SPL and will be skipped if no spl
# SDPU will be deprecated. please use SDPV instead of SDPU
# {
SDPU: delay 1000
SDPU: write -f imx-boot-800-es2-c0-fspi.bin -offset 0x10000 -skipfhdr
SDPU: jump
# }

# These commands will be run when use SPL and will be skipped if no spl
# if (SPL support SDPV)
# {
SDPV: delay 1000
SDPV: write -f imx-boot-800-es2-c0-fspi.bin -skipspl -skipfhdr
SDPV: jump
# }

FB: ucmd setenv fastboot_buffer ${loadaddr}
FB: download -f imx-boot-800-es2-c0-fspi.bin

# Check Image if include flexspi header
FB: ucmd if qspihdr dump ${fastboot_buffer}; then setenv qspihdr_exist yes; else setenv qspihdr_exist no; fi;

FB[-t 60000]: ucmd if test ${qspihdr_exist} = yes; then qspihdr init ${fastboot_buffer} ${fastboot_bytes} safe; else true; fi;

#if uboot can't support qspihdr command, use uboot image to write qspi image, which require image include qspi flash header
FB: ucmd if test ${qspihdr_exist} = no; then sf probe; else true; fi;
FB[-t 40000]: ucmd if test ${qspihdr_exist} = no; then sf erase 0 +${fastboot_bytes}; else true; fi;
FB[-t 20000]: ucmd if test ${qspihdr_exist} = no; then sf write ${fastboot_buffer} 0 ${fastboot_bytes}; else true; fi;
FB: done


Wait for Known USB Device Appear...
New USB Device Attached at 2:4
2:4>Start Cmd:SDPS: boot -f imx-boot-800-es2-c0-fspi.bin -skipfhdr
100%libusb: error [windows_transfer_callback] detected I/O error 1167: [1167] 裝置沒有連線。
2:4>Okay (0.255s)
libusb: warning [init_device] could not get node connection information for device 'USB\VID_0E0F&PID_0001\5&1FC31FA8&0&4': [87] 參數錯誤。
New USB Device Attached at 2:4
2:4>Start Cmd:SDPV: delay 1000
2:4>Okay (1.019s)
2:4>Start Cmd:SDPV: write -f imx-boot-800-es2-c0-fspi.bin -skipspl -skipfhdr
100%2:4>Okay (1.005s)
2:4>Start Cmd:SDPV: jump
6400%libusb: error [windows_transfer_callback] detected I/O error 1167: [1167] 裝置沒有連線。
2:4>Okay (0.063s)
libusb: warning [init_device] could not get node connection information for device 'USB\VID_0E0F&PID_0001\1817A00E828C1720': [87] 參數錯誤。
New USB Device Attached at 2:4
2:4>Start Cmd:FB: ucmd setenv fastboot_buffer ${loadaddr}
2:4>Okay (0.002s)
2:4>Start Cmd:FB: download -f imx-boot-800-es2-c0-fspi.bin
2:4>Okay (0.042s)
2:4>Start Cmd:FB: ucmd if qspihdr dump ${fastboot_buffer}; then setenv qspihdr_exist yes; else setenv qspihdr_exist no; fi;
2:4>Okay (0.072s)
2:4>Start Cmd:FB[-t 60000]: ucmd if test ${qspihdr_exist} = yes; then qspihdr init ${fastboot_buffer} ${fastboot_bytes} safe; else true; fi;
2:4>Okay (0.043s)
2:4>Start Cmd:FB: ucmd if test ${qspihdr_exist} = no; then sf probe; else true; fi;
2:4>Fail (0.117s)

 

 

2GB DDR stress test is ok!

*************************************************************************
       MX8 DDR Stress Test Version: ER14
       Built on Mar 27 2020 12:28:23
*************************************************************************

--Set up the MMU and enable I and D cache--
   - This is the Cortex-A35 core
  - Check if I cache is enabled 
  - Enabling I cache since it was disabled 
  - Push base address of TTB to TTBR0_EL3 
  - Config TCR_EL3 
  - Config MAIR_EL3 
  - Enable MMU 
  - Data Cache has been enabled 
  - Check system memory register, only for debug 

   - VMCR Check:
   - ttbr0_el3: 0x13d000
   - tcr_el3: 0x2051c
   - mair_el3: 0x774400
   - sctlr_el3: 0xc01815
   - id_aa64mmfr0_el1: 0x101122

  - MMU and cache setup complete 

*************************************************************************
            ARM Clock(CA35): 1200MHz
            DDR Clock: 1200MHz

============================================
        DDR configuration
DDR type is LPDDR4
Data width: 32, bank num: 8
Row size: 16, col size: 10
One chip select is used 
Number of DDR controllers used on the SoC: 1
Density per chip select:   2048MB 
Density per controller is: 2048MB 
Total density detected on the board is: 2048MB 

No DDR data training errors detected for DDRC0
============================================

MX8QXP: Cortex-A35 is found

*************************************************************************
DDR Stress Test Iteration 1
  -------------------------------- 
  --Running DDR test on region 1-- 
  -------------------------------- 

t0.1: data is addr test
....
t0.2: row hop read test
...

t1: memcpy SSN armv8_x32 test
....
t2: byte-wise SSN armv8_x32 test
..
t3: memcpy pseudo random pattern test 
....................................................................
t4: IRAM_to_DDRv1 test
...

t5: IRAM_to_DDRv2 test

Success: DDR Stress test completed!!!

 

BRs,

gravity

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1,144 Views
igorpadykov
NXP Employee
NXP Employee

Hi gravity

 

reason may be in versions incompatibility between RPA tool, SCFW, kernel and uuu versions.

So may be suggested to rebuild all image from scratch using latest revisions of

RPA tool and ddr test , SCFW and kernel as described in Release Notes document for each BSP on link

https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applicat...

 

Best regards
igor

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