Hi,
the pad configuration in the SDK I²C examples doesn't enable open-drain mode for SCL/SDA. Is this automatically enforced when using a pad for I²C or are the SDK examples missing this?
Regards
Hi,
According to the I2C specification and also, in the SOC-Level diagram is stated that the outputs are in open drain mode.
If you refer to how to set a pin for I2C, I saw an alternative to force it using SION bit in I2C Pin Muxing CRs, but the regular way should do the trick for dedicated I2C interfaces.
Thank you.
Hello @JosephAtNXP
I think you misunderstood my question: the SDK examples don't set the pads to open-drain, the ODE field of the corresponding pad control register is not modified as far as I can see. And the reference manual doesn't state if open-drain mode is enforced automatically when using a pad for I²C.
From my understanding SION bit affects input, so it's not related to open-drain mode.
Regards
Hi,
It's weird due to I2C operates considering a open-drain termination, anyways, you can modify pin_mux.c according to config tools to:
IOMUXC_SetPinMux(IOMUXC_ECSPI1_MOSI_I2C1_SDA, 0U);
IOMUXC_SetPinConfig(IOMUXC_ECSPI1_MOSI_I2C1_SDA,
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
IOMUXC_SW_PAD_CTL_PAD_FSEL(2U) |
IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |
IOMUXC_SW_PAD_CTL_PAD_PE_MASK);
IOMUXC_SetPinMux(IOMUXC_I2C1_SCL_I2C1_SCL, 0U);
IOMUXC_SetPinConfig(IOMUXC_I2C1_SCL_I2C1_SCL,
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
IOMUXC_SW_PAD_CTL_PAD_FSEL(2U) |
IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |
IOMUXC_SW_PAD_CTL_PAD_PE_MASK);
Thank you
Hello @JosephAtNXP
today I (maybe) figured out why open-drain mode is not mentioned in reference manual and also not used in the SDK examples. Take a look at NxP document IMX8MM_0N87W, iMX8MM errata:
Erratum e50045 states that setting ODE may cause malfunction of I²C. Unfortunately the SDK examples don't mention that this might be the reason why ODE isn't set.
Regards