iMX6 SRTC Mode GPIO State

[johnson_dana]

When we put the iMX6 in SRTC mode (deepest of all the sleep modes), we see current leakage paths through the iMX6. For instance we have an open drain inverter with a pullup(10k to 3.3V) on inverter output. That output goes to an iMX6 GPIO and the sleep current while in SRTC mode exceeds 40 mA, so many circuits within the iMX6 are being powered. We noticed that on VDD_3V after the PMIC was powered down, VDD_3V still had about 1.79V. Disconnecting the signal with the 10k pullup from the iMX6 entirely, results in sub 1 mA sleep currents.

Is there a way to set the GPIO to high impedance while in SRTC? I don’t think it’s possible but need to ask the question. Our backup solution is to add a buffer between the pullup and iMX6 GPIO. That buffer would be turned off completely when we enter SRTC mode.

[igorpadykov]

Hi Dana

you are right: there is no way to set the GPIO to high impedance while in SRTC.

It is not allowed to connect powered external devices to unpowered processor, also

it violates power-up sequence described in sect.4.2.1 Power-Up Sequence datasheet

i.MX 6Solo/6DualLite Applications Processors for Consumer Products

Best regards
igor
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