Dear Support Team,
I'm working on a custom iMX8MQ board with an image sensor sending RBG888 data over MIPI lanes. After reading the iMX8 reference manual and the NXP Community forum I have some doubts on MIPI-CSI Host Controller and CSI-bridge drivers concerning the RGB888 support. Below you can find a list of questions:
I modified the mx6_capture.c driver to support the RGB888:
CSI_CR18 register: MIPI_DATA_FORMAT bits set to 0x24 (RGB8888), RGB888A_FORMAT_SELECTION bit set to 0 (I want the padding byte at most significant part of image data), PARALLEL24_EN bit set to 1.
CSI_CR3 register: SENSOR_16BITS set to 0
Added a new internal CSI-bridge format as follows (I used BGR because my camera is sending data in this order, user space app will interpret them accordingly):
.name = "BGR24",
.fourcc = V4L2_PIX_FMT_BGR24,
.pixelformat = V4L2_PIX_FMT_BGR24,
.mbus_code = MEDIA_BUS_FMT_BGR888_1X24,
.bpp = 4
The first question is: Is it correct to have 4 as byte per pixels (bpp field) ? I read that the iMX8M CSI-Bridge cannot disable the zero byte padding when working in RGB888 mode. For these reason I used 4 bytes per pixel instead of 3.
I modified the MIPI HOST controller driver (mxc_mipi_csi.c) to support the RGB888 as well:
I added a new internal format:
{ /* Used for RGB888 */
.code = MEDIA_BUS_FMT_BGR888_1X24,
.fmt_reg = MIPI_CSIS_ISPCFG_FMT_RGB888,
.data_alignment = 24,
}
The question here is: is it right to have 24 as data alignment?
In my custom board I just use the MIPI HOST CONTROLLER CAM I/F and not the ISP I/F (I'm not sure there is an ISP peripheral on iMX8M board actually) so the fmt_reg and data_alignment settings should be irrelevant in this case. Is it right?
Thanks for your help,
Gianfranco
