Hello,
we use the MCIMX8MQ5DV together with a Samsung K4F8E3S4HB RAM in one of our systems. That combination worked well for some years and thousands of boards. But recently we start to have an increased failure rate in our production (about 1% fails with this specific failure). After quite some analysis I found out that U-Boot SPL has problems initializing the LPDDR4 RAM.
The problem only occurs while the system is cold. If it starts to get warm, the RAM initialization works fine. That's where it starts to get interesting: If I do the following sequence, the board starts fine:
This is repeatable. It works also the other way round:
It seems like some temperature dependent setting is made and isn't reset during a system reset but is necessary to train the RAM successfully. U-Boot is single-threaded and shouldn't do anything while in the U-Boot shell. So it most likely is some automatic mechanism in the RAM controller.
I haven't found any RAM-related registers in the i.MX yet, that would not be reset during a system reset. But it's hard to tell because the Synopsis RAM controller is missing quite some documentation. Any ideas what could cause such an effect?
Best regards
Christian Mauderer