i.MX6UL initial value of CCM_PMIC_STBY_REQ.

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i.MX6UL initial value of CCM_PMIC_STBY_REQ.

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satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6UL out of reset condition.
Please see Table 95 and Table 98 in IMX6ULCEC Rev.1.
The out of reset condition of CCM_PMIC_STBY_REQ is output, but not mentioned about initial value.
Is it 100k ohm pull-down? or 100k ohm pull-up?

Actually, I worry the signal condition when i.MX6UL is reset by POR_B during in low power mode.
In low power mode, i.MX6UL assert CCM_PMIC_STBY_REQ and the power supply voltage from PMIC is changed lower.
If CCM_PMIC_STBY_REQ keep high when i.MX6UL is reset, the power supply voltage from PMIC keeps lower voltage also.
It maybe causes boot problem since the power supply voltage for VDD_SOC_IN is out of the operating range.
So I think CCM_PMIC_STBY_REQ initial value should be low in out of reset condition same as i.MX6DQ.


Best Regards,
Satoshi Shimoda

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art
NXP Employee
NXP Employee

At initial power-on sequence, starting with application of the VDD_SNVS_IN voltage, the initial state of the CCM_PMIC_STBY_REQ pin is actively driven Low output. Further, until the VDD_SNVS_IN voltage is removed, the state of the CCM_PMIC_STBY_REQ pin is controlled by the software and/or the ONOFF button manipulatios and is not affected by the POR reset.


Have a great day,
Artur

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art
NXP Employee
NXP Employee

At initial power-on sequence, starting with application of the VDD_SNVS_IN voltage, the initial state of the CCM_PMIC_STBY_REQ pin is actively driven Low output. Further, until the VDD_SNVS_IN voltage is removed, the state of the CCM_PMIC_STBY_REQ pin is controlled by the software and/or the ONOFF button manipulatios and is not affected by the POR reset.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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