i.MX53QSB and ARM TrustZone security extentions

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i.MX53QSB and ARM TrustZone security extentions

Contributor I

Hi guys!


Anybody of you ever worked with ARM TrustZone?

I'm looking for hello-world like examples of source code.

Any help is much appreciated!


Thanks a lot!

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NXP TechSupport
NXP TechSupport

Please look at the enclosed simple example, based on ARM TrustZone one.

Note, i.MX53 Trust Zone implementation does not support SDRAM (protection) in hardware.

What is supported may be found in the i.MX53 Security Reference Manual :

"On the i.MX53, the TrustZone Architecture is integrated with other security

features as follows:

After Power on Reset (POR), the ARM core is in the Secure World, all interrupts

are Secure interrupts, all bus masters are configured as Secure World masters,

and all bus slaves can be accessed by Secure World bus masters. This has two


- If a trusted execution environment is not required, there is no need to switch

to the Normal World. In this case, the system is backwards compatible with a non

TrustZone system. All platform software runs in the Secure World without

modification for TrustZone.

- If enabled, HAB executes in the Secure World to authenticate either the

Security Kernel (on a platform using TrustZone) or the normal operating system


The CSU, M4IF and SCC Secure RAM controller enforce configurable access rights

to peripherals and memory from Secure and Normal Worlds.

The SCC and SAHARA DMA masters make Secure or Normal World accesses according

to the ARM core state in which they are programmed.

The CSU configures other bus master to make either Secure or Normal World


If not serviced, the TZ WDOG security violation alarm goes to the CSU."

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