i.MX 6 Solo CPU software self-test.

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i.MX 6 Solo CPU software self-test.

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I am working in a project with the i.MX 6 Solo and would like to implement software self-tests on the CPU that are specified by IEC 61508. Now IEC 61508 states that self-tests can be performed by writing/reading a walking-bit pattern to the registers of the CPU. The specific registers that are mentioned are:  data, address, instruction decoder. 

The problem is that I only have basic knowledge when it comes to CPU architecture, so would like to know how a test like this would be implemented. How do I know which registers that I need to write/read, and I guess that the tests need to be written i asm?

I know that some of the smaller and less advanced MCU’s have software libraries for these kinds of tests, but I have not found any for the i.MX 6 family.

So any help is really appreciated.

Here's an excerpt from IEC 61508:

Self-test by software: walking bit (one-channel)

Aim: To detect, as early as possible, failures in the physical storage (for example registers) and instruction decoder of the processing unit.

Description: The failure detection is realised entirely by additional software functions which perform self-tests using a data pattern (for example walking-bit pattern) which tests the physical storage (data and address registers) and the instruction decoder. However, the diagnostic coverage is only 90 %.”



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NXP Employee
NXP Employee

Hi Daniel

i.MX6 use Cortex-A9 core from arm (www.arm.com), regarding IEC 61508

seems Cortex-M3 is certified

ARM Enhances Feature Set of Popular Cortex-M3 Processor for… - ARM

I did not find similar info about Cortex-A9, probably it makes sense to contact

arm support Support - ARM

regarding basic i.MX6 tests, such as read/write patterns to registers, one can

look at SDK i.MX 6Series Platform SDK

Best regards



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