how does imx28 ocrom and ocram work?

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how does imx28 ocrom and ocram work?

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erickhuang
Contributor II

hello,

I recently see the imx28 the reference manual, but I had a problem.As follows,

ocram:   0x0000 0000   ~    0x0002 0000

ocrom:   0xFFFE 0000   ~ 0XFFFF FFFF

I do not understand how he is working during power-up, the cpu pointer is pointing where , OCROM or OCRAM.

In addition, Where the boot image data loaded?

I learned that the ocrom  inside has a loader code, so  the code  is already written into the chip Manufacturers???

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Erick,

Yes, your understanding is correct, this is how it works: The OCROM has the ROM code loaded. This code is the basic startup code, basically, it goes and checks the configuration of the boot pins (LDC_DATA[5:0], please see chapter 12 of reference manual), and determines what the boot source is (could be NAND, SD, MMC, or others). The ROM code does other configurations too but that is transparent for you.

Once the ROM code has determined the boot source, for example, imagine the boot pins are configured to boot from NAND, then the i.MX goes and checks the NAND, your bootloader and operating system have to be loaded here so the i.MX has SW to work with. When it starts executing what is in your NAND, a copy of the first 4K of data to the DDR takes place. These first 4K are executed from the DDR, but this is not that important either. The rest of your code is executed directly from NAND (or the boot source you selected). This is the way your operating system is executed, then your application starts.

Now, about the OCRAM, this internal memory is available for you to use for any purpose you want. Normally, I use it to store debug code there, so I make my debug program, connect throught JTAG and tell the i.MX that it has to execute the code in the RAM, that's how I test and debug the application. You can use it for any purpose, but take into account that it is RAM, so it will be cleared as soon as power goes off.

I hope this helps!

Best regards.

Jorge.

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erickhuang
Contributor II

Hi JorgeRama_rezRivero ,

Thank you for answers,and it  is very helpful to me.

However, I can't still understand that "When it starts executing what is in your NAND, a copy of the first 4K of data to the DDR takes place"

DDR?Why it is not ocram,my unstanding is that ocrom code is running at power-up, and then load the first 4K of data to the ocram ox0000 0000.At last, copy all kernel image to the ddr and the kernel take controls.

Best regards.

erick

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FrankLi1z
NXP Employee
NXP Employee

MX28 is difference with other platform.

MX28 use bootstream which combine many elf binary to one image.

Linux bootstream included three parts, power_prep, boot_prep, linux_prep and kernel.

ROM will load power_prep to RAM, then call power_prep to init power.

Then

ROM load boot_prep, then call boot_prep to initialize DDR,

ROM load linux kernel to DRAM,

ROM load linux_prep to IRAM, call linux_prep to jump to linux kernel.

If boot from NAND, you need put some meta data FCB to some NAND page, which include NAND chip info.

Tools Kobs-ng can do it for you.

Best regards

Frank Li