Using USB controller via Cortex-M4 core on IMX8 processor?

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Using USB controller via Cortex-M4 core on IMX8 processor?

2,990 Views
mugheesahmed
Contributor II

I am porting USB Host driver for a proprietary RTOS on Cortex-M4 core of IMX8 processor. The problem is that the XHCI controller is unable to fetch transfer descriptors and transfer data if I keep them in DDR Alias Address 0x10000000. If I keep them in the OCRAM_S in 0x180000, it works. But this memory is severely limited to be of any practical use.

The driver worked fine for the A53 cores as the addresses were lying in the 0x40000000 region. The USB controller seems to have some problem fetching data and descriptors from 0x10000000 when running from M4. Is there any way I can overcome this? Note: I am using M4 core so 0x40000000 cannot be accessed from it.

6 Replies

1,890 Views
silsila
Contributor I

Hey Mughees,

 

We are trying to achieve something similar on the imx8m nano. Our goal is to implement usb audio class 2 device on the cortex m7. Our only reference was those from the imx RT series examples and its usb stack.

Currently, it seems that the host computer is not able to enumerate the usb device, and the device only gets bus resets. My main concerns are:

1. What are the various clocks which need to be enalbed and at what freq (such as USB_CORE, USB_BUS and USB PHY)

2. Is there any power domain setting i need to ensure that they are correct.

3. Is the imx RT usb stack (i.e the ehci controller driver) compatible with the imx8 nano.


It will be great if you direct me to any possible examples such as a simple hid device or something which can help us in this situation.

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2,436 Views
CarlosCasillas
NXP Employee
NXP Employee

Hi Mughees,

You could refer to the USB source files (middleware->usb) of the MCUXpresso SDK for EVK-MIMX8MQ board (although there are not includes USB examples ready to test).

https://mcuxpresso.nxp.com/en/

In general, the Cortex-M core of asymmetric processors are mainly intended for real-time application, delegating the high-speed communications (like Ethernet and USB) to the Cortex-A cores.


Hope this will be useful for you.
Best regards!
/Carlos
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2,436 Views
mugheesahmed
Contributor II

Hi Carlos,

Thanks a lot for the quick reply. It was my bad that I overlooked the DDR address in the memory map for Cortex-M4 core. 0x4000000 is indeed accessible from Cortex-M4. This solved my problem. USB now runs flawlessly. Thanks a lot for your help.

Best Regards,

Mughees

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2,405 Views
dilip
Contributor II

Hello Mughees,

Are you able to get USB Host accessible from RTOS running on M4, if M4 binary is loaded via uboot? I am seeing a strange issue where USB Host interrupts are not getting triggered if loaded via uboot. Everything works fine if it is loaded via JTAG.

Best Regards,

Dilip

 

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2,387 Views
mugheesahmed
Contributor II

Well, I have not tried with u-boot yet. But there can be many possibilities if USB works from JTAG, but not from u-boot. One possibility I can think of is the cache. JTAG inherently plays with caches after loading and running an image. What OS/RTOS are you using on M4 core? Maybe the OS init code is not properly enabling caches. Maybe if you write some code to flush/invalidate all data caches at the start of OS initialization, the problem might go away.

Regards,

Mughees

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2,377 Views
dilip
Contributor II

We are using embos RTOS on M4 core. XHCI stacks are from other vendor. Was doubting RDC initially. Will look at cache related settings.

Best Regards,

Dilip

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