SJA1110A to i.MX8QM internal PHYs

[franz86]

Hi!

We are currently trying to get the SJA1110A automotive switch working on our custom i.MX8QM based board.

There are several external PHYs connected to the switch, but for a start I want to get the internal 100Base-T1 PHYs working (port5 - port10)

We are currently using kernel 5.15.67-5.15.60-2.0.0 based on linux-fslc-imx from https://github.com/Freescale/meta-freescale

I read in the DSA SJA1110 documentation, that the internal 100Base-T1 PHYs can only be used with the internal SPI-mdio driver. So I configured the Device Tree like this:

&lpspi3 {

#address-cells = <1>;

#size-cells = <0>;

fsl,spi-num-chipselects = <2>;

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_lpspi3 &pinctrl_lpspi3_cs>;

cs-gpios = <&lsio_gpio0 27 GPIO_ACTIVE_LOW>, <&lsio_gpio2 21 GPIO_ACTIVE_LOW>;

status = "okay";

switch@0 {

compatible = "nxp,sja1110a";

reg = <0>;

spi-max-frequency = <300000>;

dsa,member = <0 0>;

ports {

#address-cells = <1>;

#size-cells = <0>;

/* Microcontroller port */

port@0 {

reg = <0>;

status = "disabled";

};

/* SW1_P1 */

port@1 {

reg = <1>;

status = "disabled";

};

port@2 {

reg = <2>;

status = "disabled";

};

port@3 {

reg = <3>;

label = "cpu";

ethernet = <&fec1>;

phy-mode = "rgmii-id";

rx-internal-delay-ps = <2000>;

tx-internal-delay-ps = <2000>;

fixed-link {

speed = <1000>;

full-duplex;

};

};

port@4 {

reg = <4>;

status = "disabled";

};

port@5 {

reg = <5>;

label = "trx7";

phy-mode = "internal";

phy-handle = <&sw1_port5_base_t1_phy>;

};

port@6 {

reg = <6>;

label = "trx8";

phy-mode = "internal";

phy-handle = <&sw1_port6_base_t1_phy>;

};

port@7 {

reg = <7>;

label = "trx9";

phy-mode = "internal";

phy-handle = <&sw1_port7_base_t1_phy>;

};

port@8 {

reg = <8>;

label = "trx10";

phy-mode = "internal";

phy-handle = <&sw1_port8_base_t1_phy>;

};

port@9 {

reg = <9>;

label = "trx11";

phy-mode = "internal";

phy-handle = <&sw1_port9_base_t1_phy>;

};

port@a {

reg = <10>;

label = "trx12";

phy-mode = "internal";

phy-handle = <&sw1_port10_base_t1_phy>;

};

};

mdios {

#address-cells = <1>;

#size-cells = <0>;

mdio@0 {

compatible = "nxp,sja1110-base-t1-mdio";

#address-cells = <1>;

#size-cells = <0>;

reg = <0>;

sw1_port5_base_t1_phy: ethernet-phy@1 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x1>;

};

sw1_port6_base_t1_phy: ethernet-phy@2 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x2>;

};

sw1_port7_base_t1_phy: ethernet-phy@3 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x3>;

};

sw1_port8_base_t1_phy: ethernet-phy@4 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x4>;

};

sw1_port9_base_t1_phy: ethernet-phy@5 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x5>;

};

sw1_port10_base_t1_phy: ethernet-phy@6 {

compatible = "ethernet-phy-ieee802.3-c45";

reg = <0x6>;

};

};

};

};

};

&fec1 {

pinctrl-names = "default";

pinctrl-0 = <&pinctrl_fec1>;

phy-mode = "rgmii-id";

nvmem-cells = <&fec_mac0>;

nvmem-cell-names = "mac-address";

status = "okay";

fixed-link {

speed = <1000>;

full-duplex;

};

};

Booting the board with this config the switch config gets loaded successfully, however I get several PHY related errors during initialization:

[ 3.484375] sja1105 spi2.0: Probed switch chip: SJA1110A
[ 3.935076] sja1105 spi2.0: configuring for fixed/rgmii-id link mode
[ 3.950965] sja1105 spi2.0: Link is Up - 1Gbps/Full - flow control off
[ 3.965229] sja1105 spi2.0 trx7 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 3.979554] sja1105 spi2.0 trx7 (uninitialized): failed to connect to PHY: -EINVAL
[ 3.987163] sja1105 spi2.0 trx7 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 5
[ 4.011478] sja1105 spi2.0 trx8 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 4.025795] sja1105 spi2.0 trx8 (uninitialized): failed to connect to PHY: -EINVAL
[ 4.033433] sja1105 spi2.0 trx8 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 6
[ 4.063439] sja1105 spi2.0 trx9 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 4.077749] sja1105 spi2.0 trx9 (uninitialized): failed to connect to PHY: -EINVAL
[ 4.085377] sja1105 spi2.0 trx9 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 7
[ 4.115398] sja1105 spi2.0 trx10 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 4.129796] sja1105 spi2.0 trx10 (uninitialized): failed to connect to PHY: -EINVAL
[ 4.137511] sja1105 spi2.0 trx10 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 8
[ 4.167372] sja1105 spi2.0 trx11 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 4.181763] sja1105 spi2.0 trx11 (uninitialized): failed to connect to PHY: -EINVAL
[ 4.189481] sja1105 spi2.0 trx11 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 9
[ 4.219368] sja1105 spi2.0 trx12 (uninitialized): validation of with support 0000000,00000000,00006000 and advertisement 0000000,00000000,00000000 failed: -22
[ 4.233757] sja1105 spi2.0 trx12 (uninitialized): failed to connect to PHY: -EINVAL
[ 4.241477] sja1105 spi2.0 trx12 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 10

The ports can not be used, they do not appear as network interface.

Any help is highly appreciated

[Dhruvit]

Hi @franz86,

Please share how you are connecting the SJA1110A automotive switch with your board.

Thanks & Regards,
Dhruvit.

[franz86]

Hi Dhruvit!

Thanks for answering. Meanwhile I was able to solve the above described issue. The problem was simply that I did not enable "CONFIG_NXP_C45_TJA11XX_PHY" in the kernel. Although I did not find anything in that regard in the user-manual nor in the datasheet of the SJA1110, it seems that the TJA1103 phy or a very similar one is used internally in the switch. Enabling the driver for that PHY solved the issue.

But now that I have your attention: Even though I solved this issue now I stumbled accross a new one:

I encountered, that always only the 100Base-T1 phy which was initialized lastly is working. Meaning that when I enabled all 6 internal 100Base-T1 phys in the device-tree only the 6th port is working.

I figured out that when I manually set and clear the "MDIO_CTRL1_LPOWER" bit in the "MDIO_CTRL1" register (MDIO_MMD_PMAPMD) the other PHYs also start working.

I now added a hack to the nxp-c45-tja11xx.c driver, which does that automatically on resume. However I would like to know if that is a known issue and how to solve this properly.

Thanks, regards,
Franz

[Marco_Zaccheria]

Hi @franz86,

could you please attach here a full kernel log at power on?

Thank you

   Marco

[Marco_Zaccheria]

Hi @franz86,

there are several steps to be done to debug this issue, but I would start from the basics.

First of all, could you please confirm that you are setting up SJA1110 to boot in "no NVM" mode?

This means setting up strap pins

BOOT_OPTIONS[1:0] = 11

This is needed to exclude that the integrated MCU might do something on the switch, that is instead supposed to be completely handled by the external host through SPI.

I assume BTW that your boot configuration is already correct, so maybe let's focus on next steps.

It could be useful to see the status of the following registers at the time function nxp_c45_config_init() gets executed:

MDIO_MMD_PMAPMD:MDIO_CTRL1
MDIO_MMD_PMAPMD:MDIO_STAT1

furthermore, would be helpful understanding the sequence of calls to functions genphy_c45_pma_resume() and genphy_c45_pma_suspend(), and what are the values of the registers mentioned before when these functions execute as well.

Thank you

   Marco

[franz86]

Hi Marco!

Thanks for helping. I'll try to add debug messages to the driver and post it here. Unfortunately I am currently very busy with a lot of other stuff, so it can take a while.

With my hack the switch works fine actually. However I think it would be good to fix this issue anyway.

[Dhruvit]

Hi @franz86,

The mdio node should be declared in one of the FEC controller nodes in the device tree file.
Please try adding the mdio node in one of the FEC controller nodes.

One can refer to "fsl-s32g274a-rdb2.dts" ( S32G274ARDB Board Rev C. device tree file in /autobsps32/linux ) where SJA1110 is used.

Thanks & Regards,
Dhruvit.

[franz86]

Anyone from the NXP people willing to help with this issue?