[SEMA4][i.MX8M Mini] No interrupts triggered for Sema4 module

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[SEMA4][i.MX8M Mini] No interrupts triggered for Sema4 module

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bmsm
Contributor I

Hi,

My team and I have successfully adapted the SEMA4 driver provided for the i.MX6SX to the i.MX8M Mini platform. We can lock with no issues whatsoever using a basic driver using the exposed functions by imx_sema4.

A new entry to the device tree has also been added to make the driver work:

 

 

&aips3 {
	sema4: sema4@30ac0000 {
		compatible = "fsl,imx6sx-sema4";
		reg = <0x30ac0000 0x10000>;
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
		clock-names = "sema4";
		status = "okay";
	};
};

 

 

However, we are facing an issue where no interrupts are triggered if a gate cannot be locked by the A53 ( because the integrated M4 has already locked the gate). We have ensured that the "Semaphores Processor n IRQ Notification Enable" register has been set correctly for the gate used.

To investigate the issue, we used Ftrace to check if any interrupts were triggered, but unfortunately, there were no results. It's worth mentioning that I don't have a 6SX development board to validate whether the driver worked correctly initially.

At the moment, we're a bit lost and wondering if we might be stuck using a polling loop. If anyone has any ideas or suggestions as to why no interrupts are triggered, your input would be greatly appreciated.

Thank you in advance for your help!

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3 Replies

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Sanket_Parekh
NXP TechSupport
NXP TechSupport

Hi @bmsm 

I hope you are doing well
 
The gate cannot be locked by the A53 as the M4 has already locked it in your application.
To get out of this situation one can try to reset the gate.
To reset the gates, call either the RDC_SEMA42_ResetGate() or RDC_SEMA42_ResetAllGates() functions.
 
Please refer to Chapter 18:- RDC_SEMA42: Hardware Semaphores Driver from MCUXpresso SDK API Reference Manual.pdf in the SDK(SDK can be downloaded from the MCUXpresso SDK Builder.)
Please refer to the below document for the information related to the APIs.
 
I hope this information helps you.
 
Thanks & Regards
Sanket Parekh
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bmsm
Contributor I
Hi @Sanket_Parekh, I know that the gate is locked by the M4 in my case. From the iMX8M Mini datasheet, the core who tried to lock a locked gate should be notified by an interrupt when the gate is released (If I understood correctly the datasheet). My problem is that I can't get the interrupt to work on the A53 side.
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Sanket_Parekh
NXP TechSupport
NXP TechSupport

Hi @bmsm,

 
I hope you are doing well
 

Q)the core who tried to lock a locked gate should be notified by an interrupt when the gate is released (If I understood correctly the datasheet).
=> Yes, you are correct. The notification interrupt will be generated when the gate lock becomes free.
 
According to section 4.4.5 Application Information Reference manual IMX8MMRM.
"If the optional failed lock IRQ notification mechanisms are used, then accesses to the
related registers (SEMA4_CPnINE, SEMA4_ CPnNTF) are required."
Please check the SEMA4_CPnINE register is configured correctly.
 
The interrupt notification can be read from the read-only register Semaphores Processor n IRQ Notification(section 4.4.6.3 from the Reference manual IMX8MMRM)
Here it is mentioned that this module optionally allows the processor that fails in the lock attempt to

continue with other tasks and allow a properly-enabled notification interrupt to return its
execution to the original lock function rather than simply execute in a spin-wait loop.

 
So there should be no chance of a polling loop if IRQ notification has been used.
 
Q)My problem is that I can't get the interrupt to work on the A53 side.
=>Please confirm if you can get a lock on the A53 side if the gate is not locked by the M4 core. As both processes are running on separate cores.
For more information regarding the same kindly refer to section 3.2.2.3 Safe Sharing from Reference manual IMX8MMRM.
 
Thanks & Regards,
Sanket Parekh
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