Register reads causing synchronous aborts

[jwhowell]

Performing read operations on some i.MX8 QM registers causes synchronous abort exceptions in Cortex-A53 EL2.

These registers are referenced in the i.MX 8QuadMax Applications Processor Reference Manual (Rev 0).

Reading the Exception Syndrome Register, EL2 (ESR_EL2) gives us the value 0x9600_0210.

Bit fields [23:22] and [1:0] are both equal to 0b00, which according to Arm indicates DECERR on external access. Is this due to a lack of permissions or that the register address is incorrect?

[joanxie]

Performing read operations on some i.MX8 QM registers causes synchronous abort exceptions in Cortex-A53 EL2

>what registers do you read when you get abort exceptions? and what detailed error message did you get? pls share more detailed information with me