Question, i.MX6Q SSI time slot

Aemj · ‎04-07-2015

Hi team,

My customer is facing the issue of unexpected behavior of i.MX6Q SSI.

The customer uses SSI as slave/Network mode. And they want to transfer 4 time-slot data.

As for the register setting, RFEN0, RFEN1 and RDMAE is set to 1.

And only first time slot data is transferred.

Do you have any ideas about the cause of this?

Thanks,

Miyamoto

alejandrolozan1 · ‎04-13-2015

Hi,

Are you using a Operating system? Or using the SDK.

After checking the SDK I noticed that it fatures an API to configure the FIFOs. I believe you may find it useful .

Best Regards,

Alejandro

Aemj · ‎04-13-2015

Hi Alejandro,

Thanks for your comment.

Actually, the customer does not use OS. SDK neither.

The customer tried without SDMA and the result was the same.

Only at the first time slot, they saw RDR bit was set and the interruption occurred.

At the 2nd-4th slot, the interruption did not occur.

In the customer’s understanding, the interruption occur at the every time slot.

Is it true?

Thanks,

alejandrolozan1 · ‎05-19-2015

Hi,

Sorry for the delay. Yes, the RDR flag is set when the SRX0 is loaded with a new value.

But it is cleared only when the SRX0 is read. I wonder if you can share the code so we can take a look at it.

Best Regards,

Alejandro