We simply cannot make a small display (368x448, one DSI data lane only) work on a imx8qxp. No matter what timings we use for the display, there are no MIPI signals neither on the clock nor on MIPI_DSI0_DATA0_N/P. If we switch to two data lanes, we can see neat mipi signals. A dmesg | grep -n "drm" gives the following output:
It looks like everything is fine, but we noticed that the DSI driver is not calling the "prepare" nor the "enable" functions of the panel driver when dsi.lanes=1, hence the display is not initialised properly. It does call everyting correctly when dsi.lanes=2.
Has anyone else encountered a similar issue? Any idea what could be wrong?
I have the same issue, but in my case I cannot see the signals switching to two data lanes. One data lane does not work because it is necessary to patch the file drivers/gpu/drm/bridge/nwl-dsi.c
The function nwl_dsi_bridge_atomic_check makes lanes=1 not a choice
if (config->lanes < 2 || config->lanes > 4) return -EINVAL;
With "(config->lanes < 1" the function continues executing.