MCIMX6Q5EYM10AE

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MCIMX6Q5EYM10AE

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RamakrishnaC
Contributor II

Hi,

Thank you.

Could you please share more details why this circuit?

RamakrishnaC_0-1720027948691.png

 

3 Replies

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Alejandro_Salas
NXP TechSupport
NXP TechSupport

Hello @RamakrishnaC 

 

Sure, the circuit that you are referring is the boot selection for i.MX6Q, and in Notes you can see:

Place series resistors so as to minimize EIM portion of trace length. Two layout possibilites include:
1) As close to processor as possible.
2) Close to other components using EIM signals.

 

Also, please the Common Hardware Design for i.MX 6Dual/6Quad and i.MX 6Solo/6DualLite in chapter 6 EPD controller requirements for migration.

There is mentioned:

 

The i.MX 6Dual and i.MX 6Quad processors do not have an Electrophoretic Display (EPD) Controller (but the i.MX 6Solo and i.MX 6DualLite processors do), hence the designer has to reserve the EPD related signals when migrating an i.MX 6Quad or i.MX 6Dual hardware design to the i.MX 6DualLite or i.MX 6Solo for an eReader application.

 

I hope this information can helps to you.

 

Best regards,

--... ...--

Salas.

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RamakrishnaC
Contributor II

Hi Alejandro,
Thank you.
we are using i.Mx6quad. This is having Trusted mode and Secure mode.

Regarding secure boot Key methods implementation, In schematic do we need to add any additional circuit components related to Hardware?

Please share the details from very base level for understanding.

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Alejandro_Salas
NXP TechSupport
NXP TechSupport

Hello @RamakrishnaC 

 

Please find the attached AN4581, there is described the details to use Secure boot in some i.MX processors, including the imx6 family.

 

I hope this can helps to you.

 

Best regards,

--... ...--

Salas.

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