Lower i.MX8MM A53 clock speed to 100 MHz

[TomGibson]

Hello, we are trying to configure our i.MX8MM board to run at 200 or 100 MHz, based on this post which details higher frequencies, but nothing below 1.2GHz we have modified the &a53_opp_table in our .dts as follows:

&a53_opp_table {
        opp-100000000 {
                opp-hz = /bits/ 64 <100000000>;
                opp-microvolt = <850000>;
                opp-supported-hw = <0xf>, <0x3>;
                clock-latency-ns = <150000>;
                opp-suspend;
        };

        opp-200000000 {
                opp-hz = /bits/ 64 <200000000>;
                opp-microvolt = <850000>;
                opp-supported-hw = <0xf>, <0x3>;
                clock-latency-ns = <150000>;
                opp-suspend;
        };

        opp-400000000 {
                opp-hz = /bits/ 64 <400000000>;
                opp-microvolt = <850000>;
                opp-supported-hw = <0xf>, <0x3>;
                clock-latency-ns = <150000>;
                opp-suspend;
        };

        opp-600000000 {
                opp-hz = /bits/ 64 <600000000>;
                opp-microvolt = <850000>;
                opp-supported-hw = <0xf>, <0x3>;
                clock-latency-ns = <150000>;
                opp-suspend;
        };

        opp-800000000 {
                opp-hz = /bits/ 64 <800000000>;
                opp-microvolt = <850000>;
                opp-supported-hw = <0xf>, <0x3>;
                clock-latency-ns = <150000>;
                opp-suspend;
        };
};

We have also modified clk-pll14xx.c to add the following rates underneath the existing 600 MHz rate definition:

        PLL_1416X_RATE(400000000U,  200, 3, 2),
        PLL_1416X_RATE(200000000U,  200, 3, 3),
        PLL_1416X_RATE(100000000U,  200, 3, 4)

If we make the above modifications but without the entries for 100 MHz/200 MHz everything works as expected (but with a floor of 400 MHz).

Unfortunately with all the extra entries added, in /sys/devices/system/cpu/cpufreq/policy/scaling_available_frequencies the lowest listed frequency is still only 400000. Baseline idle power consumption is also increased for our board vs the working 400 MHz frequency, which suggests something is off with the 400 MHz configuration in this setup also. What are we doing wrong with the 100/200 MHz frequencies?

[Chavira]

Hi @TomGibson!
Thank you for contacting NXP Support!

I try to put the iMX8MN to 100MHZ and only can get 600MHz.

I do the same configurations on the device tree and I get the following result:

If you want a lower frequency our driver is not prepared for that, but you have to modify our driver using our documentation.

I don't know if that could be a good idea because the device is not prepared for lower frequencies.

Sorry for the mistake!

Best Regards!
Chavira

[TomGibson]

Hi @Chavira, 

Is lower frequency support something that has been dropped from the driver? This comment from NXP TechSupport in an older thread discussing running at 100 MHz provides a patch for the BSP to do so, but the code has changed too much since the patch for it to still work as-is, could the BSP team who provided the patch be consulted about its' applicability to newer yocto versions?

We have managed to get 400 MHz working just not 100/200, so I'm not sure why you were only able to run at 600 MHz. I have not however been able to get the frequencies lower than 400 MHz to show up as options in available frequencies which is unfortunate.

Thanks,

Tom

[Chavira · Accepted solution]

Hi @TomGibson!

I made the next modifications to clk-pll14xx.c

and the next modifications to imx8mn.dtsi

and I get success changing the frequency of my device.

I am using iMX8MN-EVK, but for iMX8MM should be the same.

Best Regards!

Chavira

[TomGibson]

Thanks, I tried the changes you posted and these worked, I can get 100/200/400 MHz.