Hi,
I am working on a custom IMX8QXP Rev C0 based development board much similar to MX8-MEK board. I have a SPI NOR FLASH connected to the lpspi3 controller of the SOC. I also have a customised linux running on the board.
When the spi dirvers are being loaded, it will check the JEDEC bit of the SPI-NOR flash, which is 0xbf2541 in my case(as per SPI datasheet).
When I set the SPI clock speed to 25MHz, kernel driver reads the JEDEC bits properly and the driver is loaded properly. The /dev/mtd0 also comes properly in linux.
When I set the SPI clock speed to 50MHz, the JEDEC bit read as 0xdf1220, which is a one bit shifted to right for each of the bytes. Here the mtd driver is not loaded.
I saw that in errata IMX8X_0N99Z (ERR050537), the flex SPI has got some issue with reading transaction.
- Is there a similar issue for the LPSPI as well?
- Can you please suggest me some steps to debug/ resolve this issue?
Any help/support will be deeply appreciated. If you need anymore data to analyze the issue, please let me know.
PS: We have another board with IMX8QXP Rev B0, in which we have same spi flash connected to LPSPI0 and we are able to do spi transactions at 50MHz and the driver is also loaded there properly.
