Issues with imx28 i2c slave Rx functionality

[zeeshanaslam]

I have success with slave TX in dma mode but I am facing some issues, particularly with slave RX functionality.

I set the following configuration in dma descriptor for slave receive:

CTRL0_XFER_COUNT = 1

CTRL0_RETAIN_CLOCK = 1 (on all but last byte of expected transaction size)

CTRL0_ACKNOWLEDGE = 1

CTRL0_RUN = 1

and

pio_words = 1, wait4endcmd=1, decsem=1, irq = 1,dma_cmd = 0x1, len = 1

I implement the receive process as follows: After determining its master write request from I2C_STAT register, I setup the dma desc. as described above, reset the dma channel # 6 (APB dma and i2c blocks are already reset) and start the dma channel (writing command address to NXTCMD register and incrementing semaphore by 1) but I incorrectly receive 0xFF (slave address is 0x43) whereas some times there is no activity on dma channel and i2c bus and RUN is not cleared. On dma interrupt when I try to receive next byte after setting dma desc. in same way and again resetting (?) and starting the dma channel , again no activity on dma and bus remains busy.  The point to say here is that if I am following correct configuration sequence for receive processing then why do I get 0xFF as first byte (when my slave address is 0x43 and first byte to receive is 0xAA) and dma and i2c bus stalls with no activity on second iteration (2nd byte). Am I expected to receive the first dummy byte (0xFF) or am I missing/doing something wrong in receive processing sequence/state machine described above. In any case no further bytes are received. If I2C data_completion and early_irq interrupts are to be enabled, what I am expected to as part of these interrupt handling apart from keep clearing them after each byte receive.

I seem to have duplicated everything in mx28_i2c_slave_demo.patch and tried quite a few other things as well but have not been able to get the things working as cleanly as they should.

Slave is transmitting successfully with similar configuration and processing sequence. Please try to elaborate process for receiving I2C bytes in a bit detail if there is something missing so that we can figure out what's going wrong.

One more thing, 'sometimes' i2c slave doesn't generate address match interrupt slave_irq on first attempt when I send a transfer request from Aardvark master and sometimes I have to try 2 or 3 times to succeed. Why start condition is not being detected on first attempt every time on bus (known issue?) or may be issue with Aardvark master? I have I2C_CTRL0 = 0x00040000 (slave address search enabled) at start up.

Thanks much!!

Regards,

Zeeshan

Message was edited by: Zeeshan Aslam

[PeterChan]

Hello Zeeshan,

When the incorrect 0xFF is received as the first byte, what is the value in HW_I2C_DATA register?

In slave mode after determining it is a master write request from I2C_STAT register, I don't think you need to reset the DMA channel Just write the DMA descriptor to HW_APBX_CHx_NEXTCMDAR and increase the HW_APBX_CHx_SEMA will do. Please notice that in the mx28_i2c_slave_demo.patch, PIO mode is used to receive the slave address. After the address match, DMA channel is setup to handle the i2c data transaction. In slave receive mode, it is because the number of data byte to be received is unknown and data remaining the FIFO will not flush upon early termination, the DMA descriptor is configured to just receive one byte repeatedly until the transaction terminated by master.

Finally, in i2c slave receive mode, you should always keep the BM_I2C_CTRL0_DIRECTION bit clear.

Regards,

Peter

[zeeshanaslam]

I have also tried slave TX/RX using PIO mode instead of dma mode, using following mechanism to Tx data through I2C_DATA register:

                        /* Wait for HW_I2C_DEBUG0_DMA_REQ bit to get set*/

                        while(I2C_DRIVER_CHECK_DMA_REQ(i2c_base_address) == 0);

                        /*  Send Data Byte*/

                        I2C_DRIVER_SEND_DATA(i2c_base_address, data);

                        /* Clear DMA REQ bits. */

                        I2C_DRIVER_CLEAR_DMA_REQ(i2c_base_address);

For master mode, this scheme works but for slave only first 4 bytes are transmitted, after that nothing is transmitted nor i2c_debug0_dma_req gets set. Please confirm if this is limitation with pio in slave mode??

Regards,

Zeeshan Aslam

[YixingKong]

Zeesham Aslam

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