Invalid DDR map on imx6qp

[prathamrahate]

I am using custom imx6qp board with DDR chip MT41K1G16. I am using JTAG to run DDR stress test v2.60 tool on imx6qp. I am using file ddr-test-uboot-jtag-mx6dq.elf. Stress test tool is able to start, it hangs after some time while doing calibration. It shows BOOT_CFG[5:4] = 0x03. Invalid DDR map. Below is the log from DDR stress test tool

============================================
        DDR Stress Test (2.6.0)
        Build: Oct 24 2016, 15:21:46
        NXP Semiconductors.
============================================

============================================
        Chip ID
CHIP ID = i.MX6 Dual/Quad (0x63)
Internal Revision = TO2.0
============================================

============================================
        Boot Configuration
SRC_SBMR1(0x020d8004) = 0xf7ff575e
SRC_SBMR2(0x020d801c) = 0x11000001
============================================

What ARM core speed would you like to run?
Type 1 for 800MHz, 2 for 1GHz, 3 for 1.2GHz 
ARM Clock set to 1GHz

============================================
        DDR configuration
BOOT_CFG3[5-4]: 0x03, Invalid DDR map.
DDR type is DDR3
Data width: 64, bank num: 8
Row size: 16, col size: 10
Chip select CSD0 is used
Density per chip select: 4096MB

What is the reason for showing Invalid DDR map??

[igorpadykov · Accepted solution]

Hi Pratham

please check table in sect.2.3 DDR mapping to MMDC controller ports

and BOOT_CFG3[5-4] in Chapter 5 FuseMap i.MX6DQ Reference Manual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

probably fuses were inadvertently blown.

Best regards
igor
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[prathamrahate]

Hi Igor,

Thanks for the replay.

It was issue with BOOT_CFG3 pin configuration. Both pins were pulled high instead of pull down.

After pulling down pins BOOT_CFG3[5:4], i am not seeing Invalid map error.

Regards,

Prathamesh