[IMX8MP] How to make BCLK output 12MHz

[petertseng]

The codec does not connect MCLK to the IMX8MP processor.

And the specification of the TLV320AIC3101 allows BCLK to be used as the PLL input instead of MCLK

But how to make BCLK output clock (12MHz) ?

The following is my DTS:

&sai3 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai3>;
	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <12000000>;
	clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
			<&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
			<&clk IMX8MP_CLK_DUMMY>;
	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
	status = "okay";
};

	pinctrl_sai3: sai3grp {
		fsl,pins = <
			MX8MP_IOMUXC_NAND_DATA01__AUDIOMIX_SAI3_TX_SYNC		0xd6	/* AUD_TXFS */
			MX8MP_IOMUXC_NAND_ALE__AUDIOMIX_SAI3_TX_BCLK		0xd6	/* AUD_TXC */
			MX8MP_IOMUXC_NAND_CE0_B__AUDIOMIX_SAI3_TX_DATA00	0xd6	/* AUD_TXD */
		>;
	};

Thanks in advance,

Best Regards
Peter

[joanxie]

refer to the table imx_pll1443x_tbl in the clock driver, current pll doesn't support 12Mhz, only 12.288Mhz, maybe you need add your own parameter to support this new clock

linux-imx/drivers/clk/imx/clk-pll14xx.c at lf-6.6.y · nxp-imx/linux-imx · GitHub

or maybe you can try to change the 

assigned-clock-parents = <&clk IMX8MP_CLK_24M>;