IMX8MP ENET_QOS RGMII REF CLOCK

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

IMX8MP ENET_QOS RGMII REF CLOCK

Jump to solution
467 Views
Jerry_H
Contributor I

Hi,

we are trying to use ENET1 and ENET_QOS on IMX8MP.

For ENET1 the REF_CLOCK is listed in the signal mapping as GPIO1_IO00.

When I now look for the signal mapping for ENET_QOS there is no such pin defined.

Do I have to share the ENET1 clock signal using a clock buffer or are there any other pins use?

ENET1 and ENET_QOS should run in RGMII mode.

Any hints where to get this signal from?

 

Kind regards.

0 Kudos
1 Solution
426 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @Jerry_H 

For EQOS CLOCK mapping, you can choose EXT_CLK_4 if you want to use external clock.

Zhiming_Liu_0-1694738244366.png

 

But in evk dtsi, eqos is using SYS_PLL1 and SYS_PLL2.

Zhiming_Liu_1-1694738302087.png

There is no clock name like ENET_QOS_REF_XXX, maybe the ENET_QOS_TIMER_CLK_ROOT is your need.

Zhiming_Liu_2-1694738649843.png

Best Regards

Zhiming

 

 

View solution in original post

0 Kudos
1 Reply
427 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @Jerry_H 

For EQOS CLOCK mapping, you can choose EXT_CLK_4 if you want to use external clock.

Zhiming_Liu_0-1694738244366.png

 

But in evk dtsi, eqos is using SYS_PLL1 and SYS_PLL2.

Zhiming_Liu_1-1694738302087.png

There is no clock name like ENET_QOS_REF_XXX, maybe the ENET_QOS_TIMER_CLK_ROOT is your need.

Zhiming_Liu_2-1694738649843.png

Best Regards

Zhiming

 

 

0 Kudos