IMX8MN low-power disable DDR and unneeded pll

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IMX8MN low-power disable DDR and unneeded pll

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k_specka
Contributor II

Hello when suspending the A53 core and letting the M7 running ATF needs to be patched.
On the low power demo this is done letting the plls and DDR running (AN12195)

But to save some more power it should be possible to shutdown the ram, too.
And also some plls should be possible to turn off.

On AN13400 dram_retention.c is patched for ddr, so it is a bit confusing to first patch it to let it run and then to shut down the dram pll...
Are really both needed? Which plls can be turned off when M7 is running and only gpio is in use?

Also the final use case would be to completely reboot the A core after shutdown or suspend while M7 is still running. How can we archive that?
Can we let M7 run on shutdown?

 

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AldoG
NXP TechSupport
NXP TechSupport

Hello,

You're referring two different use case implementation, for the use case that you want I would suggest to follow AN13400.
 

In this app note everything you need to know is explained and the how to, some of the chapters that you may want to check are:

4.3 Make the M core alive when the A core is in Suspend mode

4.3.2 Method 2: Define LPA flags in the M core application

5.5.5.1 Check modules’ root clocks in the kernel

Best regards/Saludos,
Aldo.

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k_specka
Contributor II

Thanks for the quick reply, 
as we don't need high performance on the M core its clock and the uart clock is set to 24MHz.
Is it correct that I don't have to care about the plls in this case because all plls are switched off in this case?

The 2nd scenario is to reset the A core while the M core stays running.
 I have seen some posts for a S32 board where this was possible when using halt.
But this turns off also the M core here.
Is there a way to restart/reboot the A core while the M core stays alive?
Maybe trigger a reboot instead of resuming the system from suspend? Or by halt?

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AldoG
NXP TechSupport
NXP TechSupport
Hello,

Yes, it is ok to have set it to 24MHz for both UART and M7 core. this is the first scenario described in AN.

For your second question, no this is not possible, it is possible to send to sleep/deep sleep the A core and keep M core running, but reboot/restart is not.

This because A core is the master and once a reboot/restart is triggered the whole system resets.

Best regards/Saludos,
Aldo.
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