IMX8M mini Cortex-M ECSPI Pin Config

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

IMX8M mini Cortex-M ECSPI Pin Config

Jump to solution
1,065 Views
Dhevan
Contributor IV

Hi,

I have configured ecspi1 for cortex m4 core.

I had found issue chip select does not working.

    IOMUXC_SetPinMux(IOMUXC_ECSPI1_MISO_ECSPI1_MISO, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_MISO_ECSPI1_MISO, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_PE_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_SS0_ECSPI1_SS0, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_SS0_ECSPI1_SS0, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_PE_MASK);

If we remove spi cs configuration and configured as a gpio that time is working but we want interrupt method to read data from spi we can't control the gpio.

Why chip select pin doesn't working ?

How to configure chip select pin properly ?

2) Another issue is writing data to the spi transmit structure it's sending only first byte.

example.

uint8_t tx_buff[2];
uint8_t rx_buff[2];
tx_buff[0] = '0x45';
tx_buff[1] = '0x34';

masterXfer.txData = (uint32_t *)tx_buff;
masterXfer.rxData = NULL;
masterXfer.dataSize = 2;
masterXfer.channel = kECSPI_Channel0;
//GPIO_PinWrite(EXAMPLE_LED_GPIO, EXAMPLE_LED_GPIO_PIN, 0U);
ECSPI_MasterTransferBlocking(EXAMPLE_ECSPI_MASTER_BASEADDR, &masterXfer);

  In above code second byte doesn't proper it's sending some junk data.

  How to write 1byte data properly ?

Tags (1)
0 Kudos
1 Solution
1,035 Views
Dhevan
Contributor IV

Hi Aldo,

Thanks for your reply,

ECSPI driver both polling and interrupt CS not proper. I have used GPIO for CS now issue resolved.

Ticket - https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M1879...

 

Thanks & Regards,

         Vasu

View solution in original post

0 Kudos
3 Replies
1,032 Views
josephzhou1
Contributor V

ok

Best Regards,
Joseph Zhou Jianhui / Senior Embedded Software Engineer, Singapore
0 Kudos
1,043 Views
AldoG
NXP TechSupport
NXP TechSupport

Hello,

In our demo example we do use CS not a GPIO, I believe you have used this example as reference. We use ECSPI2 I'll check if there are some issues with ECSPI1 CS.

Could you share the junk data received?
for example is it random data?

Best regards,
Aldo.

0 Kudos
1,036 Views
Dhevan
Contributor IV

Hi Aldo,

Thanks for your reply,

ECSPI driver both polling and interrupt CS not proper. I have used GPIO for CS now issue resolved.

Ticket - https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M1879...

 

Thanks & Regards,

         Vasu

0 Kudos