IMX6ULL GPT input capture mode

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IMX6ULL GPT input capture mode

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sergei_p
Contributor III

Hello,

We need to measure input frequency of about 30 MHz. The idea is to use IMX6ULL GPT2, clocked internally with the 24MHz IPG clock, and configure the input frequency pin JTAG_MOD (ie to be measured) as External Clock in GPT2_CR, and JTAG_TDO as GPT2_CAPTURE2.

The Reference Manual has a statement:

To ensure proper operations of GPT, the external clock input frequency should be less than 1/4 of frequency of the peripheral clock (ipg_clk).

Now the question: if we use the divider "4" set in GPT2_PR, to divide the input 30MHz to the safe value of (30/(4+1)) 6MHz, will that satisfy the "1/4" restriction above?

Thanks!

Regards,

Sergei

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sergei

yes that condition will satisfy the "1/4" restriction.

Best regards
igor
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sergei_p
Contributor III

Thanks, Igor!

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sergei_p
Contributor III

Igor,

I'm sorry but my tests don't confirm your statement that the EXT_CLK input frequency could be divided by prescaler in GPT_PR for proper measurements. What we see, is that irrelevant to the prescaler,  measurements of the high frequencies  are not correct . Here is my test, with 39.6MHz supplied to JTAG_MOD, with IPG_CLK=66 MHz:

# Configure JTAG_MOD as GPT2_CLK

U-Boot > mw.l 0x20E0044 1

# Reset GPT2
U-Boot > mw 0x20e8000 0x8000

# Configure and start GPT2: EXT_CLK, WAITEN, ENMOD, EN

U-Boot > mw 0x20e8000 0x000cb

# Set prescaler to (19 + 1)
U-Boot > mw 0x20e8004 0x13

# MEasure the counter
U-Boot > md 0x20e8024 1;sleep 10;md 0x20e8024 1
020e8024: 123b89c3 ..;.
020e8024: 13050c6b k...

U-Boot >

Calculations shows that calculated value doesn't match 39.6MHz:

(gdb) p (0x13050c6b-0x123b89c3)*20/10 $1 = 26412368 (gdb) 

If I set JTAG_MOD (GPT2_CLK) to a lower frequency (eg 16 MHz), measurements are correct.

Could you please comment on the above data?

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Sergei

seems you are right, from sect.30.2.1 External Clock Input i.MX6ULL Reference Manual :

"The external clock input (GPT_CLK) is treated
as asynchronous to the peripheral clock (ipg_clk). To ensure proper operations of GPT,
the external clock input frequency should be less than 1/4 of frequency of the peripheral
clock (ipg_clk)."

http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf 

Best regards
igor

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