IMX6SX EHCI Host Controller short read packet QH->Token->Active bit behavior.

[AndrewDeAngelis]

IMX6SX EHCI Host Controller question:

We are using Micrium uC/III Synopsis-style EHCI HCD for host controllers with TT on the USB host port. We want to do a read that could be long or short. when we ask for a ~64K BULK-IN from the driver, it sets up it's endpoint QH with 4 QTDs in a chain and alt-next set to 0x00000001. A short read occurs and an interrupt is generated. at this time the QH->Token->Active bit is set, and the first QTD->Token->Active bit is not set, and the other three QTD->Token->Active bits are not set.

Why is the QH->Active bit still set when the a short packet occurs and the alternate next pointer is set as invalid?

What is the proper sequence to avoid or workaround this occurance?

Thank you,

Andrew DeAngelis 

[AndrewDeAngelis]

This may not be an issue with the processor, but instead be happening because the terminate bit in the Alternate Next pointer is set. We are going to try terminating qtd list with a dummy and pointing alternate next to that dummy qtd.

[CarlosCasillas · Accepted solution]

Hi Andrew,

The BSPs provided by NXP for the i.MX6SX processor are Linux/Android for the A9 core, and MQX/FreeRTOS for the M4 core. As you are using uC/III OS, have you considering the option of asking to Micrium?

Hope this will be useful for you.

Best regards!

/Carlos

[AndrewDeAngelis]

Yes, we should be able to resolve our issue with the help of Micrium support. Thank you.