I have an IMX6 connected via AUD3 to RT5670.
I would like to configure codec as SLAVE and SSI2 as master.
The system/master clock of audio chip is connected to the NANDF_CS2 pin of IMX6 which can be configured in IOMUX to use the CKO2 signal. The audio clocks needs to be derived from the PLL4. So the CKO2 signal needs to be derived from PLL4. But the imx6 chip currently does not seem to support setting CKO2 source to PLL4 directly.
CKO2 source can be set to CKO1 source, which can have it's source set to PLL4.
1. We are able to set CKO1 source as PLL4 via dts file. But no clock signals are there on CSI0_MCLK .
Now if I will try to play a sound using aplay, there is no clock signal in CSI0_MCLK. ie CKO1. But in clock summary it is shown that, enable count for both CKO1 & PLL4 as 1, after the apaly command.
&clks{
assigned-clocks = <&clks IMX6QDL_CLK_CKO1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>;
};
codec: rt5670@1c {
compatible = "rt5670";
reg = <0x1c>;
clocks = <&clks IMX6QDL_CLK_CKO1>;
};
sound {
compatible = "fsl,imx-audio-rt5670";
model = "rt5670-audio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audio>;
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
asrc-controller = <&asrc>;
audio-routing =
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR",
"Line Out Jack", "LOUTL",
"Line Out Jack", "LOUTR";
mux-int-port = <2>;
mux-ext-port = <3>;
};
pinctrl_audio: audiogrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x10059
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x80000000
};
&ssi2 {
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>;
fsl,mode = "i2s-master";
status = "okay";
};
2. How to set CKO2 source to CKO1 in dts file ?
imx6 configuration
i2s mode
rt5670
i2s audio
