How to reduce PCIe current consumption of i.MX7D

[toshiharu_shimi]

Hi, 

I have tried entering "Full Powerdown" of PCIe to reduce the PCIe current consumption.

According to "Example Code 4", I change the value of  related register such as "GPC_PGC_PCIE_CTRL" .But current consumption is not changed.(It is about 150mA!)

I tnink register value has not changed though execute "Example Code 4" program run.

Are there neccesary other registers to  execute "Example Code 4"?

Would you tell me How to enter "Full Powermode" of PCIe?

I connect to power supply "PCIE_VP" and "PCIE_VPH".

And other PCIe pins are as follows.

Because I don't use PCIe function, but I would like to use JTAG Boundary scan function.

So that, I would like PCIe enter to "Full Powerdown". 

[toshiharu_shimi]

Hi.

This is Additional Posting. 

According to "Example Code 4", after powering up the PCIe PHY, I changed bit 1 (PCIEPHY_G_RST) of the PCIe PHY reset control register (SRC_PCIEPHY_RCR) from 1 to 0, and it was possible to read/write to registers other than PCIE_PHY_CMN_REG19. However, I cannot read/write to PCIE_PHY_CMN_REG19.
I would like to power down by setting bit 3 PD_CMN to 1. Please tell me how to set it up.

[Rita_Wang]

I will help confirm.

[toshiharu_shimi]

@Rita_Wang

Thank you for your reply.

Is there any information needed?

[Rita_Wang]

First of all, DS introduced unused PCIe pins should tie to ground. Strongly recommend to follow that.

Then PCIe and MIPI share 1P0 and 1P8. We measured the power voltage in yellow below. 1P0 and 1P8 power votage is close to zero with PCIe and MIPI disabled. It's able to see the difference within uboot and then use MIPI device tree such as imx7d-sdb-mipi-dsi.dtb with kernel. MIPI is the cause to consume the power. 

From your data 150mA, suppose you enable MIPI. Could you confirm that? 

[toshiharu_shimi]

@Rita_Wang

Thank for your reply.
Because I use JTAG boundary scan function, I have connected PCIE_VP and PCIE_VPH to 1P0 and 1P8 power suplly. This is in accordance with the following message.
Solved: Hardware design to using boundary scan test of i.M... - NXP Community

As you mentioned, I use MIPI to LCD I/F and MIPI PHY power cunsumption is included in 150mA.
When PCIE_VP and PCIE_VPH connected to GND, working only MIPI, the power consumption is 40mA @VDDA_1P8. So, I think the power consumption of PCIe PHY is 150mA - 40mA = 110mA @VDDA_1P8.
This is large current for our products.

Because I have to always the MIPI power on, I can't disable 1P0 and 1P8 power supply.
According to Table 20 below, I think PCIe can be set to "Slumber Mode" or "Full powerdown" though keeping 1P0 and 1P8 power supply.

Would you teach me flowchart of setting to "Slumber Mode" or "Full powerdown"?

Thank you.

[Rita_Wang]

Hi @toshiharu_shimi ,

OKay we will manage to wireout 7D SDB for power current measurement.

At the meantime, could you help to check the below?

1. Does customer split MIPI power and PCIe power for their hardware design? Is the original power schematic customer's design following i.MX7D Sabre board? Ask this becasue customer mentioned PCIE power can connected to GND and doesn't impact MIPI. Can the customer share their schematic of power as below if so?

2. Customer mentioned 150mA with PCIe power. Can I know if any S/W configuration to enable PCIe? 150mA@1P8 is not low. Our last test, the power voltage is close to zero with MIPI and PCIe disable. We can't ensure how much current MIPI consumes. Customer's data 110mA@1P8 is weird if there is no enabling of PCIe.

Wish you have a nice day

Best Regards

Rita