How to read i.MX7ULP Unique ID

[MrCry0]

There are several solutions for 2-words UIDs.

But, according to RM, iMX7ULP provides 5 32-bit registers described as containing bits of the UID: HW_OCOTP_CFG[0-4] (OTP Bank1 Word[3-6]). (https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf 34.7.1.24-28).

What is the correct way to get the UID on iMX7ULP? I failed to find a solution either in RM or on forums.

[igorpadykov]

Hi Oleksandr

fuses UNIQUE_ID can be found in IMX7ULPRMB2_Rev0_Fusemap.xlsx attached in reference manual,
as described in sect.34.5 Fuse Map : "See the Fusemap attached with this reference manual"

For reading fuses one can try to follow :
https://imxdev.gitlab.io/tutorial/Burning_eFuses_on_i.MX/

Best regards
igor

[MrCry0]

Well, I'm trying to rephrase the question.

Reading registers is not a problem. The issue is how to assemble a UID from 5 32-bit registers.

If the Fusemap which is said to must have had been attached in the reference manual includes details on how to calculate a UID - that would be enough.

But, unfortunately, I don't see any attached files (especially, the IMX7ULPRMB2_Rev0_Fusemap.xlsx). Could you please provide more detailed instructions about where to find that Fusemap file?

There is no similar xlsx file on the Documentation Page as well (https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-proces...).

[igorpadykov · Accepted solution]

 

 

[MrCry0]

Igor, thank you very much!

Now I see. I used a web browser Chrome to view the RM file, but Chrome doesn't seem to support attaches in PDF files

I've managed to find and open attaches with another PDF viewer. So the Fuse definitions seem clear enough to me.

The only issue remains there is a possible mistake in the RM pdf document.

The Fuse definitions claim there are 4 words used to assemble UID and there is DIR_BT_DIS fuses at the 0x4F0[0] address:

Bank 1, Word 3	Redundancy	0x04B0[15:0]	SJC_CHALL[15:0]/UNIQUE_ID[15:0]	16	SJC CHALLENGE/Unique ID
Bank 1, Word 4	Redundancy	0x04C0[15:0]	SJC_CHALL[31:16]/UNIQUE_ID[31:16]	16
Bank 1, Word 5	Redundancy	0x04D0[15:0]	SJC_CHALL[47:32]/UNIQUE_ID[47:32]	16
Bank 1, Word 6	Redundancy	0x04E0[15:0]	SJC_CHALL[63:48]/UNIQUE_ID[63:48]	16
Bank 1, Word 7	Redundancy	0x4F0[0]	DIR_BT_DIS	1	'Direct External Memory Boot Disable NOTE: Change definition for ULP1'

Whereas the RM file IMX7ULPRMB2.pdf claims there are 5 registers contain info about UID and there is no register with the direct external memory boot bit:
34.7.1.24-34.7.1.28 (and in the OCOTP Memory map table [34.7.1.1]). See attached images.

Anyway, thanks for your help, my issue is resolved! Have a nice day!