How can I control the spi clk

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How can I control the spi clk

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joseargao
Contributor I

We are using a custom imx6dl board which I am attempting to use for communications with a BLE module. This module requires that two clk cycles be detected before and after each SPI transaction, like so:

Screen Shot 2018-07-09 at 12.19.56.png

I would like to modify the spi-imx driver to support this behavior, but it is not clear to me how the clock is controlled. Enabling or disabling the clock does not seem to trigger the cycles. I would like some guidance on how I can proceed from here.

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jimmychan
NXP TechSupport
NXP TechSupport

There is no setting for inserting extra cycles before or after the spi transaction. I think you may try to use gpio-spi.

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