Can IMX8M support 2 pieces of 1GbX16 DDR4? Only DRAM_nCS0 is used, and DRAM_nCS1 is left floating. If T PCB routing topology is used, whether 65Ω resistor must be added to VTT on the address and control line. Please give a reference design. Thanks.Is there a corresponding BSP？
Hello Haochengdong Haochengdong,
The Reference Design available is the i.MX8MQ EVK (for which Design Files are provided on the NXP website). The recommendations for DDR4 design with the i.MX8MQ can be found on the i.MX8QM Hardware Design Guide (link below, please note that you may need to login to download this document.
There is also an Application Note that may be useful (AN5097, link below, you may need to login to download this document) that covers hardware and layout considerations for DDR4 designs albeit not for i.MX8QM specifically.
I hope this helps!