Fixed LVDS pixel clock on IMX8MP-EVK

[Controller4]

Hi, I'm trying to use LCD pannels with LVDS on imx8mp-evk. (imx-yocto-L5.10.52_2.1.0)

I add .dts file for the LCD and set pixel clock to 66.24MHz like below code but, it did not work.

Here is my code

width-mm = <245>;
height-mm = <184>;

/* CD121X-MT, 1024x768 (XGA) */
panel-timing {
        /* calculate, 60Hz 66274920 */
        clock-frequency = <66240000>;
        hactive = <1024>;
        vactive = <768>;
        hback-porch = <165>;
        hfront-porch = <165>;
        vback-porch = <20>;
        vfront-porch = <20>;
        hsync-len = <8>;
        vsync-len = <3>;

        hsync-active = <0>;
        vsync-active = <0>;
        de-active = <1>;
        pixelclk-active = <0>;
};

On the clk_summary, I could check the pixel clock like below but it fixed to 74.25MHz. When I change the pixel clock with other frequency, the clock did not changed and just fixed with 74.25MHz. 

I found the clock 74.25/2MHz(37.125MHz) and when I change my code with 37.125MHz, it works.

So, is there other pixel clock I can use? 
I have to use 4 other LCD pannels but it's hard to use it with just two clocks(74.25MHz & 37.125MHz). 

Thanks.

[zircon2021]

You need to modify kernel code, not only the device tree.

Some simple tips:
1, drivers/gpu/drm/imx/imx8mp-ldb.c. There was some hard coded things, it needs to be cleared.
2, you need add proper freq point in pll table. I forget where it is. PLL freq point is predefined, not calculated upon user request.

Then you will see freq change on lvds clock lines.

Fix all the things may take some time, keep an eye on "mode->clock". I forget the details, so just some tips.

[Controller4]

Thanks for your reply.

I modified my kernel code, "mode->clock", the freq did not changed when I checked with my Oscilloscope. It just changed in the kernel clock summary tree. 

Also, I could not find predefined PLL freq point.

Thanks.

[zircon2021]

Found some notes from the log, so just FYI.

1, set parameters through device tree, use "panel-timing".
2, drivers/clk/imx/clk-pll14xx.c: imx_pll1443x_tbl: set proper clock freq settings.
3, drivers/gpu/drm/imx/imx8mp-ldb.c: imx8mp_ldb_encoder_atomic_check && imx8mp_ldb_encoder_mode_valid: modify for the settings.

May it helps.

[abelal]

Hi @Controller4, were you able to make the clock work as you expected to?

I have a similar situation where the panel in use typically requires a 65MHz clock and has a min/max clock limit at 52/71MHz. It doesn't work with this hardcoded clock of 74.25MHz. Any help would be really appreciated.

[Goran]

Hi,

here you can find a very good description how to change the LVDS clock:

https://developer.toradex.com/linux-bsp/application-development/multimedia/display-output-resolution...

See capitel "Verdin iMX8M Plus LVDS Known issues"

A pity that there is no description for MIPI DSI clock.

Best regards, Goran