Ethernet Link UP and Link Down Continuously on custom board based on iMX6 ethernet RMII mode phy LAN8710A .

[ngisp]

Hi all ,

We are working on our custom board based .  its using imx6 and the ethernet is in RMII mode and phy is LAN8710A. Issues is once the kernel boots up we are getting continous log as shown below. We are able to use tftp from uboot promt . Also same images configurations we have tested on 10 boards. Only in 2 out of 10 we are facing this issue.

Below are our changes in uboot and kernel . Please verify the same. Is any initialization sequence missing ??

In u-boot-2009.08

board/freescale/customxxx/custom-boardxxx.c

int board_init(void) {

        mxc_iomux_v3_init((void *)IOMUXC_BASE_ADDR);

        setup_boot_device();

        fsl_set_system_rev();

        /* board id for linux */

        gd->bd->bi_arch_number = 4412;

        /* address of boot parameters */

        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

        setup_uart();

#ifdef CONFIG_NAND_GPMI

                setup_gpmi_nand();

#endif

#if defined(CONFIG_ENET_RMII) && !defined(CONFIG_DWC_AHSATA)

               setup_fec();

#endif

        return 0;

}

static int setup_fec(void)

{

        u32 reg = 0;

        s32 timeout = 100000;

        /*

        * get enet tx reference clk from internal clock from anatop

        * GPR1[21] = 1

        */

        reg =  readl(IOMUXC_BASE_ADDR + 0x4);

        reg |= (0x1 << 21);

        writel(reg, IOMUXC_BASE_ADDR + 0x4);

        /* Enable PLLs */

        reg = readl(ANATOP_BASE_ADDR + 0xe0); /* ENET PLL */

        if ((reg & ANATOP_PLL_PWDN_MASK) || (!(reg & ANATOP_PLL_LOCK))) {

                reg &= ~ANATOP_PLL_PWDN_MASK;

                writel(reg, ANATOP_BASE_ADDR + 0xe0);

                while (timeout--) {

                        if (readl(ANATOP_BASE_ADDR + 0xe0) & ANATOP_PLL_LOCK)

                                break;

                }

                if (timeout <= 0)

                        return -1;

        }

        /* Enable FEC clock */

        reg |= ANATOP_FEC_PLL_ENABLE_MASK;

        reg &= ~ANATOP_PLL_BYPASS_MASK;

        writel(reg, ANATOP_BASE_ADDR + 0xe0);

        return 0;

}

int board_eth_init(bd_t *bis)

{

        int rc = -ENODEV;

        return rc;

}

In include/asm-arm/arch-mx6/mx6dl_pins.h

#define MX6DL_PAD_RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT                   \

-               IOMUX_PAD(0x06BC, 0x02D4, 7, 0x080C, 1, MX6DL_ENET_PAD_CTRL)

+               IOMUX_PAD(0x06BC, 0x02D4, 0x17, 0x080C, 1, MX6DL_ENET_PAD_CTRL)

Kernel Changes -  linux-3.0.35

In "arch/arm/mach-mx6/board-ihmvisio7.c"

/*****************************************************************************

*

* Init FEC and AR8031 PHY

*

*****************************************************************************/

static int ihmvisio7_fec_phy_init(struct phy_device *phydev) { return 0; }

/* ------------------------------------------------------------------------ */

static int ihmvisio7_fec_power_hibernate(struct phy_device *phydev) { return 0; }

/* ------------------------------------------------------------------------ */

static struct fec_platform_data ihmvisio7_fec_data = {

        .init                   = ihmvisio7_fec_phy_init,

        .power_hibernate        = ihmvisio7_fec_power_hibernate,

        .phy                    = PHY_INTERFACE_MODE_RMII,

};

/* ------------------------------------------------------------------------ */

static __init void ihmvisio7_init_ethernet(void)

{

        IMX6_SETUP_PAD(ENET_MDIO__ENET_MDIO); // SMI Data Input/ouput

        IMX6_SETUP_PAD(ENET_MDC__ENET_MDC); // SMI clock

        IMX6_SETUP_PAD(ENET_REF_CLK__ENET_TX_CLK); // reference clock

        IMX6_SETUP_PAD(ENET_CRS_DV__ENET_RX_EN); //Carrier sense

        IMX6_SETUP_PAD(ENET_RX_ER__ENET_RX_ER); // Receive error

        IMX6_SETUP_PAD(ENET_TX_EN__ENET_TX_EN); // transmit enable

        IMX6_SETUP_PAD(ENET_TXD0__ENET_TDATA_0); //RMII

        IMX6_SETUP_PAD(ENET_TXD1__ENET_TDATA_1); //RMII

        IMX6_SETUP_PAD(ENET_RXD0__ENET_RDATA_0); //RMII

        IMX6_SETUP_PAD(ENET_RXD1__ENET_RDATA_1); //RMII

        IMX6_SETUP_PAD(RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT); //RMII

        IMX6_SETUP_PAD(SD4_DAT0__GPIO_2_8);   // phy reset

        gpio_request(ihmvisio7_RGMII_RST, "rgmii reset");

        gpio_direction_output(ihmvisio7_RGMII_RST, 0);

#ifdef CONFIG_FEC_1588

        mxc_iomux_set_gpr_register(1, 21, 1, 1);

#endif

        msleep(10);

        gpio_set_value(ihmvisio7_RGMII_RST, 1);

        imx6_init_fec(ihmvisio7_fec_data); 

}

Any initialization missing ?????

Error log on booting

PHY: 1:00 - Link is Up - 100/Full

PHY: 1:00 - Link is Down

PHY: 1:00 - Link is Up - 100/Full

PHY: 1:00 - Link is Down

PHY: 1:00 - Link is Up - 10/Full

filesystem built on Thu, 27 Feb 2014 11:04:53 +0530

xxx login: root

Password:

login[2612]: root login on 'ttymxc1'

root@xxx ~$

Regards

sn ng

[igorpadykov]

Hi sn

if such behaviour is on some boards this may be just hardrware issue:

poor soldering or bad contact on board connector.

Best regards

igor

[ngisp]

Hi igor ,

But we doubt if some phy (LAN8710A) initialization is missing in kernel as the board seems to attain ip after some up -down-up-down logs..

In kernel we have added these changes --

Kernel Changes -  linux-3.0.35

In "arch/arm/mach-mx6/board-ihmvisio7.c"

/*****************************************************************************

*

* Init FEC and AR8031 PHY

*

*****************************************************************************/

static int ihmvisio7_fec_phy_init(struct phy_device *phydev) { return 0; }

/* ------------------------------------------------------------------------ */

static int ihmvisio7_fec_power_hibernate(struct phy_device *phydev) { return 0; }

/* ------------------------------------------------------------------------ */

static struct fec_platform_data ihmvisio7_fec_data = {

        .init                             =         ihmvisio7_fec_phy_init,

        .power_hibernate      = ihmvisio7_fec_power_hibernate,

        .phy                            = PHY_INTERFACE_MODE_RMII,

};

/* ------------------------------------------------------------------------ */

static __init void ihmvisio7_init_ethernet(void)

{

        IMX6_SETUP_PAD(ENET_MDIO__ENET_MDIO); // SMI Data Input/ouput

        IMX6_SETUP_PAD(ENET_MDC__ENET_MDC); // SMI clock

        IMX6_SETUP_PAD(ENET_REF_CLK__ENET_TX_CLK); // reference clock

        IMX6_SETUP_PAD(ENET_CRS_DV__ENET_RX_EN); //Carrier sense

        IMX6_SETUP_PAD(ENET_RX_ER__ENET_RX_ER); // Receive error

        IMX6_SETUP_PAD(ENET_TX_EN__ENET_TX_EN); // transmit enable

        IMX6_SETUP_PAD(ENET_TXD0__ENET_TDATA_0); //RMII

        IMX6_SETUP_PAD(ENET_TXD1__ENET_TDATA_1); //RMII

        IMX6_SETUP_PAD(ENET_RXD0__ENET_RDATA_0); //RMII

        IMX6_SETUP_PAD(ENET_RXD1__ENET_RDATA_1); //RMII

        IMX6_SETUP_PAD(RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT); //RMII

        IMX6_SETUP_PAD(SD4_DAT0__GPIO_2_8);   // phy reset

        gpio_request(ihmvisio7_RGMII_RST, "rgmii reset");

        gpio_direction_output(ihmvisio7_RGMII_RST, 0);

#ifdef CONFIG_FEC_1588

        mxc_iomux_set_gpr_register(1, 21, 1, 1);

#endif

        msleep(10);

        gpio_set_value(ihmvisio7_RGMII_RST, 1);

        imx6_init_fec(ihmvisio7_fec_data);

}

Can you please confirm our doubt ??

Regards

sn

[igorpadykov]

Hi sn

one can look at attached file.

Best regards

igor

[SergejB]

Hi Igor,

Is there a similar Patch for IMX 8?

We have the same Problem with Link Swing. Our Setup is IMX 8 and LAN8710A in RMII Mode.

Regards

Sergej

[ngisp]

igor ...where is the attached file..m unable to find it ...

[igorpadykov]

you should see in previous thread picture below

then click on MX6_RMII.zip

[ngisp]

thank igor...got it ...previous thread was not showing it .

:-)

[ngisp]

Hey thanks igor issue resolved  as continuous ping was failing from uboot too :smileyconfused: we cross checked with hardware details and were able to make it work now.

Thank you :smileyhappy: