5V supply on NXP design

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5V supply on NXP design

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idom
Contributor II

In the 8MMINI-BB design there is  Q101 FET which turns on after the VDD_3V3 turns on.

VDD_5V connected to the USB TYPE-C circuit, Is there any reason for that delay or can I assemble R120?

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1 Reply

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Ido Office,

I asked our experts and they explained that in the 8MMINI-BB design,  USB2 is the primary supply, and USB1 can work at "UFP" and "DFP" mode.
USB1/USB2 is default "UFP" mode.

When USB1 in "DFP" mode, VDD_5V as a source that supplies power to external circuit through J301, while USB1 PTN5110NHQZ is powered by VDD_3V3, not from USB1_OTG_VBUS_F. If VDD_3V3 is no power, USB1 PTN5110NHQZ cannot switch to "DFP" mode. From IMX8MM EVK design, there will be also not power to VDD_5V, USB1_VBUS and USB2_VBUS.

 

Image 39.jpg

 

This delay isn't forced, but user's design should meet iMX8MMini powerup sequence as Page23 of datasheet IMX8MMCEC. It would depend on whether you also need to use the USD PD source function.

Regards,