T2080RDB secure boot demo

[cpoland]

Hi,

I am attempting to enable secure boot from NOR flash on my T2080RDB following the demo described starting in 10.3.1.7 of the QorIQ SDK v2.0 Documentation and am running into some problems. At this point I am only looking to enable secure boot using a RCW and be able to verify that I can reach u-boot securely and get some UART output.

What I have done so far is:
     -Retreived images from QorIQ Linux SDK v2.0 PPCE6500 IMAGE.iso
          /t2080rdb/u-boot-secure-boot-2016.01+fslgit-r0.bin
          /t2080rdb/rcw/t2080rdb/RRFFXX_P_66_15/rcw_66_15_1800MHz_sb.bin
     -installed QorIQ SDK v2.0
     -Setup env for T2080RDB (source ./fsl-setup-env -m t2080rdb)
     -built cst (bitbake cst-native)
     -generated keys (./gen_keys 4096)
     -generated OTPMK (./gen_otpmk_drbg 2)
     -Moved u-boot-secure-boot-2016.01+fslgit-r0.bin into my CST directory and renamed in u-boot.bin
     -Used the uni_sign tool to sign the u-boot image (./uni_sign ./input_files/uni_sign/t1_t2_t4/input_uboot_nor_secure)
          -Aquired SRKH from the console output of this step

Following above I have acquired the following images:
     -rcw_66_15_1800MHz_sb.bin
     -u-boot.bin (formerly u-boot-secure-boot-2016.01+fslgit-r0.bin)
     -hdr_uboot.out
     -OTPMK and SRKH

I had no problems burning OTPMK and SRKH on my T2080RDB. md fe0e821c shows all 1s as expected and I can see my SRKH with md fe0e823c

I then booted to regular u-boot and regular RCW in NOR Bank0 and programed the above images into NOR Bank4.
     rcw_66_15_1800MHz_sb.bin -> EC000000
     u-boot.bin (formerly u-boot-secure-boot-2016.01+fslgit-r0.bin) -> EBF40000
     hdr_uboot.out -> E8B00000
     hdr_uboot.out -> ECB00000
          -I put this header in both NOR banks because the documentation was unclear which addr was current/alt.

When I switch to boot from Bank4 I get no UART output. Switching back to Bank0 allows me to boot regular u-boot as expected.

I have done the suggested troubleshooting, here are the results:
     -Check the status register of sec mon block: 0x8000AD00
          No errors.
     -Check the SCRATCHRW2 for errors: 0x00000000
          No errors.
     -Check SecMon State: 0x8000AD00
          In 'Trusted' state (0xd).
     -Check entry point field in header: cffffffc
          I have attached /input_files/uni_sign/t1_t2_t4/input_uboot_nor_secure where this value can be verified. I can see cffffffc appears at offset 0x1c of hdr_uboot.out
     -Ensure that u-boot image has been compiled with the required secure boot configuration...
          I am using precompiled /t2080rdb/u-boot-secure-boot-2016.01+fslgit-r0.bin from QorIQ Linux SDK v2.0 PPCE6500 IMAGE.iso

Can I receive any advice on how to proceed? I suspect that possibly the entry point (cffffffc) is not correct for T2080RDB however I am not sure what other value it could be. I have searched through much of the T-series documentation and am not sure what the significance of the value cffffffc is and I am not seeing other references to the term 'entry point.' What exactly is this parameter referring to? CONFIG_RESET_VECTOR_ADDRESS? CONFIG_SYS_TEXT_BASE?

I notice that Chapter 10.3.1.10 ISBC Validation Error Codes in QorIQ SDK v2.0 Documentation mentions that core exception codes can be read for T1/T2/T4 platforms (Table 328, 329, etc). What register can these codes be read from? They may provide more detailed information for this.

I have attached all relevant images/documents I am using, any additional information about modifications I need to make to these default files would be appreciated.

Edit: I notice that my debug probe suggests that while I'm in this 'trusted' state (0xd) I am executing PC:EFF40960 which seems to map to InstructionTLBError in u-boot System.map. Perhaps this will provide more clarity as to the state the board is in / what must be modified.

Thanks!