P3T1755 I3C communication issue: No ACK till SCL high pulse width <=75ns

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P3T1755 I3C communication issue: No ACK till SCL high pulse width <=75ns

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Andrey4
Contributor I

Hi Support Team!

When using P3T1755 in I3C mode on I3c bus where it was the only one slave device, it was noticed that after power up and bus initialization, it was not responding to broadcast command during DAA. So it failed to get Dynamic address assigned. We used ISC recommended SDR timing of 40+200ns ( 40ns is high pulse width).

Then we try to variate timing and increase the width of the high pulse (OD_HIGH_TIMING).

At the value of 75ns sensor start send ACK and obtained DAA.

Interestly enough: if we reduce high pulse timing after this back to 40 ns restart DAA - it will send ACK. But if we power cycle sensor it fails again.. 

 

How to make P3T1755 to work properly upon Power up?

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8 Replies

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Andrey4
Contributor I

It might not be so obvious in my original description, but sensor is failing to acknowledge CCC command sent to 7E broadcast address. when master starts DAA procedure.

 

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Andrey4
Contributor I

7E no Ack. 40ns+200ns clk7E no Ack. 40ns+200ns clk7E with Ack 75ns+200ns clk7E with Ack 75ns+200ns clk

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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Andrey,

please refer to this link. The I3C address arbitration is most probably the reason. After the power cycle you will need longer time to pass the arbitration process, but later you can shorter it.

JozefKozon_2-1710495520707.png

JozefKozon_3-1710495588675.png

With Best Regards,

Jozef

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474 Views
Andrey4
Contributor I

Thank you, unfortunately Linux opensource I3C master driver do not explicitly support alternate OD timing for the first broadcast command. Typically, all timings: OD, PP, I2C are programmed before bus controller init. And only can be changed with full bus reinitialization. But I will give a try to this idea.

Do you confirm that by default i2c spike filter is enabled in sensor even when it configured on the board to work in I3C mode?

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437 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Andrey,

if you mean the 20ns low-pass filter in the section 8.3, then yes it is valid for both I2C and I3C.

With Best Regards,

Jozef

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Andrey4
Contributor I

No. I mean 50ns spike filter. Which is turn on/off depending on I2C or I3C mode. Again, it is not mentioned in your datasheet, but by the test results it looks like it is implemented

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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Andrey,

yes, it is not mentioned in the datasheet. Unfortunately I cannot confirm it. But since you have confirmed it in your application, then it is on for both I2C and I3C.

With Best Regards,

Jozef

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577 Views
JozefKozon
NXP TechSupport
NXP TechSupport

Hi Andrey,

please refer to the Figure 3. in the P3T1755 datasheet. After power up you should start with a CCC command. Please try it again with the ENTDAA and the communication still fails, please try an other CCC. 

JozefKozon_0-1710404565976.png

JozefKozon_1-1710404659296.png

With Best Regards,

Jozef

 

 

 

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