single ADC. For parallel/simultaneous operation of both
ADCs, either for sampling the same channel by both ADCs
or for sampling different channels by each ADC, some
amount of decrease in performance can be expected. Care
must be taken to stagger the two ADC conversions, in
particular the sample phase, to minimize the impact of
Hi, it means simultaneous operation of both ADC may induce unspecified decreasing of performance (caused by crosstalk) what’s however may not be issue for certain applications.
For accurate conversion only one ADC needs to be active in the sampling phase.