System clock range in S32K144

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System clock range in S32K144

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amarjeet_kumar
Contributor II

Hi All,

I am new to S32K14x family, can someone please answer for my below query.

Is it possible to operate system clock below 48MHz in S32K144. Please also provide some details on System clock range in S32K144.

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jorge_a_vazquez
NXP Employee
NXP Employee

Hi Amarjeet kumar

Yes, you canactually use the SlowIRC and used as source clock for the SYS_CLK, with the SCG_xCCR[DIVCORE] you can divide this clock up to /16, giving 500kHz in this clock.

Please remember that SYS_CLK must not be configured less than BUS_CLK and BUS_CLK must be a integer divefe of CORE_CLK.


Have a great day,
TIC

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amarjeet_kumar
Contributor II

Hi Jorge

Thanks for the reply and it helped.

In my project we will be not using FIRC , SIRC and PLL to drive the system clock and peripheral clocks.

We will be using EXTAL / XTAL to drive the system clock at 16 MHz or less then 16 MHz.

can we use EXTAL/XTAL to drive system clock at 16 MHz  or less then 16 MHz ?

How can i verify on S32K144EVB-Q100 that my system clock is driving at 16 MHz ?

waiting for your response...

Thanks

Amarjeet

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jorge_a_vazquez
NXP Employee
NXP Employee

Hi Amarjeet kumar

Yes, there shouldn't be any problem to source the system clock with the crystal directly. You can root the SOSC_CLK signal of the crystal to the CLKOUT pin to verify that you have signal in SCG_SOSC_CLK, and in order to verify that your core work at the same frequency, you can root the HCLK clock to this pin to verify that the core is working also at this frequency.

Hope this helps

Best regards

Jorge Alcala

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