Sin and Sout interface inversion problem of SPI

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Sin and Sout interface inversion problem of SPI

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261件の閲覧回数
azure
Contributor I

Hi,all

        While troubleshooting the SPI configuration, I discovered that the input and output interfaces of the UJA1169's SPI were mistakenly cross-connected with those of the SPI1 on my S32K312 board, resulting in an inverted connection. 

        Therefore, as stated in the Reference Manual, I attempted to configure Sin as the output interface and Sout as the input interface by adjusting the CFGR1[PINCFG] setting. However, after completing the configuration, I found that normal communication was still not possible.

        May I inquire if it's feasible to reverse the roles of SPI1's Sin and Sout interfaces? And if so, are there any additional configuration considerations or precautions I should be aware of?

        My SPI configuration is as shown in the attached file. By the way, the CLK (Clock) and CS (Chip Select) signal waveforms are normal.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @azure,

If PINCFG = 0x3, SIN is the output whereas SOUT is the input.

You need to change the configuration of the pins, output and input buffers.

danielmartynek_0-1722416047479.png

 

Regards,

Daniel

 

 

 

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238件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @azure,

If PINCFG = 0x3, SIN is the output whereas SOUT is the input.

You need to change the configuration of the pins, output and input buffers.

danielmartynek_0-1722416047479.png

 

Regards,

Daniel

 

 

 

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223件の閲覧回数
azure
Contributor I

        Thank you for your assistance.

        Currently, SPI communication between the S32K312 and the UJA1169 is functioning properly. However, I've encountered a new issue. I'm attempting to put the UJA1169 into sleep mode by first sending SLPC = 0, followed by MC = Sleep. Yet, regardless of the data I send, the UJA1169 simply echoes back the same data and does not enter sleep mode. For instance, using the Lpspi_Ip_SyncTransmit() function, I send a two-byte array where the first element is the register address (0x74 << 1) and the second element is the specific value 0, but the UJA1169 merely returns the identical values. Is this echoing behavior from the UJA1169 normal? Are there any critical points that I might have overlooked?

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azure
Contributor I

This is what the oscilloscope displays. Among them, blue represents the CS signal, yellow represents the CLK signal, purple represents the output signal, and green represents the input signal.

Thanks.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @azure,

This is an S32K community, I understand the S32K issue has been resolved.

If you have any issues with the SBC, please post it in this power management community, this is supported by another team.

https://community.nxp.com/t5/Power-Management/bd-p/Power-Management

 

Thank you,

Daniel

 

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180件の閲覧回数
azure
Contributor I
Hi,Daniel
OK,Thanks for your help!
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