S32K344 GPIO Reset Status Questions

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S32K344 GPIO Reset Status Questions

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MVR
Contributor III

I'm using an S32K344, 257-pin BGA package.

I would like to understand a little more about the reset status over the pins that we can see in the SK344_IOMUX.xlsx.

1) What does DCF mean?

MVR_0-1692982014501.png

 

2) And, if I would like to get the pin state on boot, before reach the "void main(void)" point, would I have to get the "Pad State After Selftest" column, correct?

 

3) Is there a default state for direction (input/output), Driver type (push-pull/pullup...), alternate function and drive strength? 

 

4) What is the difference between DCF and MDM?

 

Thank you!

MVR

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi

A1: PTA2 and PTA3 are allocated to FCCU fault output and PTA5 is for RESET_b. These pins can be configured via DCF records.

S32K344 PTA2 PTA3 PTA5.png

For FCCU: These pins will behave based on fault protocol used. Refer to chapter 53.3.5 EOUT interface of S32K3XXRM Rev.7.

S32K3xx_DCF_clients Utest DCF Client Register Bits.png

A3: See the MSCR reset value of the AC column, which contains these functions.

MSCR Reset value S32K344_IO Signal Table.png


Best Regards,
Robin

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