S32K311 hardfault issue

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S32K311 hardfault issue

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tonyxu
Contributor I

My project enter hardfault, I use FlexIO+DMA to I2S/ADC/CAN/UART/I2C function. The Hardfault happenned while run to Clock_Ip_pfkNotificationsCallback(CLOCK_IP_RAM_MEMORY_CONFIG_ENTRY, RESERVED_CLK) function in debug mode. The debug by step is clockStatus = Clock_Ip_Init(&Clock_Ip_aClockConfig[0]); >>>Clock_Ip_InitClock(Config);>>>Clock_Ip_SetWaitStates();>>>Clock_Ip_pfkNotificationsCallback(CLOCK_IP_RAM_MEMORY_CONFIG_ENTRY, RESERVED_CLK);

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Shuailin
NXP Employee
NXP Employee

Hi @tonyxu ,

After analyzing customer's project, we reproduced this issue on S32K312 EVB, and found something.

It is the wrong memory allocation which caused abnormal code execution.

In "libAvas.c" file, here are 3 huge arrays, seems they were allocated at section DTCM:

Shuailin_0-1688376940212.png

However, there is no ".DTCM_data" section in linker file. Then the compiled result showed a wrong section was inserted in ".text" section, this accident may affect the code execution:

Shuailin_1-1688377105344.png

The wrong operation allocated the arrays into SRAM instead of DTCM, which deviate from customer's original intention. We still have no idea about why there is no issue/warning reported by GCC compiler, however, glad that we have found it finally!

Therefore, please kindly modified the attribute section name to the correct name, which can be found in linker file:

Shuailin_2-1688377439128.pngShuailin_3-1688377465789.png

After tweaking the allocation section names, the issue disappeared.

By the way, please be careful about the memory usage especially the SRAM. The compile result of .bss in customer's project is getting close to the max size. You can try to allocate different data/code into other memory area, or try to improve the compile optimization level from "-O0" to "-Os", etc.

Another potential problem would be the "Power" component configuration in .mex file, in Which the MCU peripheral gate clock was not enabled totally. If customer trying to operate the non-gate clock enabled peripherals, it will generate a bus error, and then jump into hardfault:

Shuailin_0-1688382093288.png

Therefore, please kindly check the peripherals will be used, and check the corresponding peripheral clock enabled.

FYI.

Best Regards,

Shuailin Li

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