MPU S32K144 can not change region descriptor (RGD)

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MPU S32K144 can not change region descriptor (RGD)

2,042 Views
klau
Contributor II

Hi Dear Reader(s),

I am trying to exercise the memory protection unit functions, but anything that I changed the descriptor would take the codes to HardFault_Handler().  See line 116 to line 122 in the main.c from the attached file. These lines are copied below.

// Descriptor 0
// MPU->RGD[0].WORD0 = 0x1FFF8000; // start address
// MPU->RGD[0].WORD1 = 0x20000000; // end address
// MPU->RGD[0].WORD2 = 0x61f7df; // access R/W for masters: M7 - M0
// // 0x7df;
// //0x61f7df reset value suggests there are M3 - M0 masters.
// MPU->RGD[0].WORD3 = 1; // optional PID, PIDMask, Valid

I have also tried to write back what were in these registers, the mcu would go to HardFault_Handler().

Is there anything I need to change to enable the write to region descriptors?

Thanks,

Kevin 

PS. attached zip file.

7 Replies

1,731 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Kevin,

Please have a look at this thread:

https://community.nxp.com/message/1158836 

Thanks,

BR, Daniel

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1,731 Views
klau
Contributor II

Hi Daniel,

Could you try the program I posted please?

Thanks,

Kevin

On Tue, Aug 6, 2019 at 3:27 AM danielmartynek <admin@community.nxp.com>

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Kevin,

If I understand, you want to restrict the core access (write and read) in Descriptor 5.

You write:

MPU->RGD[5].WORD2 =  0x7c0;‍

Which means:

[4-3] M0SM = 0b00 r/w/x; read, write and execute allowed.

It should be

MPU->RGD[5].WORD2 = 0x7D8;‍‍

[4-3] M0SM = 0b11 Same as User mode defined in M0UM

[2-1] M0UM = 0b000 An attempted access of that mode may be terminated with an access error (if not allowed by
another descriptor) and the access not performed.

But looking at Descriptor 0 and the core access rights in the Supervisor mode, I see that you allows the core to access the whole map.

So, the descriptor 5 won't trigger anyway.

Regards,

Daniel

 

1,731 Views
klau
Contributor II

Hi Daniel,

Thank you very much for your helps, I can set up the MPU now.

When I looked at the EAR/EDR, and I could NOT find the exact address that caused the error.

1) Block write access

MPU->RGDAAC[0] = 0x7dd; // restrict the write access

*(unsigned int *)0x20004000 = 0xAABBCCDD;    or

*(unsigned int *)0x20006000 = 0xAABBCCDD;

CESR[SPERR3]  = 1

EAR3  = 0x20006fe0; <<<<<<<<<<<<<<<<<< Is this estimate of address? I expect 0x20004000 or 0x20006000.
EDR3 = 0x80000007; 
2) Block read access
MPU->RGDAAC[0] = 0x7db;  /* restrict read access */
temp = *(unsigned int *)0x20006000;
CESR[SPERR0]  = 1
EAR0  = 0x4C0
EDR0 = 0x80000006
CESR[SPERR2]  = 1
EAR2  = 0x1fff800C; <<<<<<<<<<<<<<<<<< Is this estimate of address? I expect 0x20006000.
EDR2 = 0x80000006;
My test codes is attached.
Thanks,
Kevin
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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Kevin,

The default S32DS startup code copies the vector table into SRAM_L and the Stack is located in SRAM_U. 

Regards,

Daniel

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1,729 Views
klau
Contributor II

Hi Daniel,

I have changed all RGDs so that only Debugger is allowed to access the memory.

And I used these lines to test.

*(unsigned int *)0x20006000 = 0xAABBCCDD;
temp = *(unsigned int *)0x20006000;

I just do not understand why the codes can NOT go to HardFault_Handler().

Please find the attached and run it.

Is there anything that I have missed?

Thanks,
Kevin

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1,527 Views
riglesias2021
Contributor III

Hi, did you solved that?? I am having the same issue. I defined a region without any privileges but it seems i can write to it anyways using a pointer in that way.

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