Input Capture for S32K146 not working

cancel
Showing results for 
Search instead for 
Did you mean: 

Input Capture for S32K146 not working

948 Views
sanjanashamsund
Contributor I

Hi,

I am using s32k146 eval board. I am trying to use input capture for PTC14 and PTB3. For some reason i am not able to configure it correctly. I want to use the system clock for this. The interrupts dont get triggered and i am not able to capture the count as well.

Is there any sample code available or if you can give me a sample code. It would be of great help.

Thanks.

0 Kudos
4 Replies

325 Views
dianabatrlova
NXP TechSupport
NXP TechSupport

Hi Sanjana,

You can refer to AN5303 - Features and Operation Modes of FlexTimer Module on S32K.

There is a software AN5303SW. The SW was written for the first S32K144 with outdated header files. So, please do not import the project.

I hope it helps you.

Best regards,

Diana

0 Kudos

308 Views
MarcoB74
Contributor I

Dear Diana,

if I try to open your reference "There is a software AN5303SW.", the system gives me an error "Page not found"

Thanks

0 Kudos

305 Views
dianabatrlova
NXP TechSupport
NXP TechSupport

 

Dear Marco,

 

All application notes with SW are available in the NXP site in the application note section:

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/s32k-automotive-mc...

AN5303:

https://www.nxp.com/webapp/Download?colCode=AN5303SW&docLang=en

 

I hope it helps.

Best regards,

Diana

0 Kudos

325 Views
sanjanashamsund
Contributor I

Thanks Diana!

I referred and implemented the same in my code.

I have made the following changes:

#include "S32K146.h" /* include peripheral declarations S32K146 */

uint32_t temp, counter,period[20],FTM1_CH1_period,FTM1_CH2_period,temp1;

/* FTM1 is initialized to generate signals for Single-Edge Capture Mode of FTM0
* and Dual-Edge Capture Mode of FTM0 */
void Signals_Generator()
{
/* Enable clock for FTM1 */
PCC->PCCn[PCC_FTM1_INDEX] = PCC_PCCn_PCS(6) | PCC_PCCn_CGC_MASK;
/* Enable clock for PORTB */
PCC->PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK;
/* Enable clock for PORTC */
PCC->PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK;

PORTB->PCR[2] = PORT_PCR_MUX(2); // Set PTB2 for FTM1 – Channel0
//PORTB->PCR[3] = PORT_PCR_MUX(2); // Set PTB3 for FTM1 – Channel1
PORTD->PCR[8] = PORT_PCR_MUX(6); // Set PTD8 for FTM1 – Channel4
PORTD->PCR[9] = PORT_PCR_MUX(6); // Set PTD9 for FTM1 – Channel5

FTM1->CONTROLS[0].CnSC=FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; // Select high-true pulses
//FTM1->CONTROLS[1].CnSC=FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->CONTROLS[4].CnSC=FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->CONTROLS[5].CnSC=FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK; // Select high-true pulses
FTM1->MOD = FTM_MOD_MOD(11200 - 1); // Set Modulo (10kHz PWM frequency @112MHz system clock)
FTM1->CONTROLS[0].CnV=FTM_CnV_VAL(2800); // Set channel Value
//FTM1->CONTROLS[1].CnV=FTM_CnV_VAL(5600); // Set channel Value
FTM1->CONTROLS[4].CnV=FTM_CnV_VAL(1000); // Set channel Value
FTM1->CONTROLS[5].CnV=FTM_CnV_VAL(5600); // Set channel Value
FTM1->CNT = 0; // Counter reset
FTM1->SC|=FTM_SC_CLKS(1)|FTM_SC_PWMEN0_MASK|FTM_SC_PWMEN1_MASK|FTM_SC_PWMEN4_MASK
|FTM_SC_PWMEN5_MASK; // Select clock and enable PWM
}

/* SW=4 - Single-Edge Capture Mode */
void FTM0_Single_Edge_Capture_Mode() //FOR INPUT CAPTURE ON PTC14 - FTM1CH1
{
/* Enable clock for PORTC */
PCC->PCCn[PCC_PORTC_INDEX] = PCC_PCCn_CGC_MASK;
/* Select and enable clock for FTM1 */
PCC->PCCn[PCC_FTM1_INDEX] = PCC_PCCn_PCS(6) | PCC_PCCn_CGC_MASK;

PORTC->PCR[14] = PORT_PCR_MUX(2); // Set PTC14 for FTM1 - Channel1
S32_NVIC->ICPR[105 / 32] = 1 << (105 % 32); /* FTM1 ch1: clr any pending IRQ*/
S32_NVIC->ISER[105 / 32] = (1 << (105 % 32)); // Enable FTM1 interrupt

/* Input capture mode sensitive on rising edge to measure period of tested signal */
FTM1->CONTROLS[1].CnSC = 0x48u; //Falling edge 0x48u; Rising FTM_CnSC_ELSA_MASK | FTM_CnSC_CHIE_MASK (Enable Interrupt)
//Rising or Falling 0x4Cu (Enable interrupt 0x40u);
/* Reset counter */
FTM1->CNT = 0;
/* Select clock */
FTM1->SC = FTM_SC_CLKS(1);
}

void FTM0_Single_Edge_Capture_Mode1() //FOR INPUT CAPTURE ON PTB3 - FTM1CH2
{
/* Enable clock for PORTB */
PCC->PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK;
/* Select and enable clock for FTM1 */
PCC->PCCn[PCC_FTM1_INDEX] = PCC_PCCn_PCS(6) | PCC_PCCn_CGC_MASK;

PORTB->PCR[3] = PORT_PCR_MUX(2); // Set PTB3 for FTM1 - Channel2
S32_NVIC->ICPR[106 / 32] = 1 << (106 % 32); /* FTM1 ch2: clr any pending IRQ*/
S32_NVIC->ISER[106 / 32] = (1 << (106 % 32)); // Enable FTM1 interrupt

/* Input capture mode sensitive on rising edge to measure period of tested signal */
FTM1->CONTROLS[2].CnSC = 0x48u; //Falling edge 0x48u; Rising FTM_CnSC_ELSA_MASK | FTM_CnSC_CHIE_MASK (Enable Interrupt)
//Rising or Falling 0x4Cu (Enable interrupt 0x40u);
/* Reset counter */
FTM1->CNT = 0;
/* Select clock */
FTM1->SC = FTM_SC_CLKS(1);
}

int main(void)
{

/* Single-Edge Capture Mode */

Signals_Generator();
FTM0_Single_Edge_Capture_Mode();
FTM0_Single_Edge_Capture_Mode1();

for(;;);

}


void FTM1_Ch0_Ch1_IRQHandler(void)
{
FTM1_CH1_period = FTM1->CONTROLS[1].CnV - temp; // Period calculation
temp = FTM1->CONTROLS[1].CnV; // Save C0V value into the variable
FTM1->CONTROLS[1].CnSC &= ~FTM_CnSC_CHF_MASK; // clear channel flag
}

void FTM1_Ch2_Ch3_IRQHandler(void)
{
FTM1_CH2_period = FTM1->CONTROLS[2].CnV - temp1; // Period calculation
temp1 = FTM1->CONTROLS[2].CnV; // Save C2V value into the variable
FTM1->CONTROLS[2].CnSC &= ~FTM_CnSC_CHF_MASK; // clear channel flag
}

But there is an issue, FTM1_Ch0_Ch1_IRQHandler(), gets invoked once and FTM1_Ch2_Ch3_IRQHandler() doesn't get invoked at all.

Am i missing something?

It would be of great help if you could tell me where i am going wrong since i've been stuck with this issue for a long time.

Regards,

Sanjana

0 Kudos