External clock doesn't work [S32K314]

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External clock doesn't work [S32K314]

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sergiverdaguerelausa
Contributor II

Good morning,

After first steps on S32K312 EVB and all working properly we migrate to S32K314 with custom board.

When we use any peripheral with external clock the program flow stops when try to read or write any register related to that peripheral (FlexCAN0).

The CORE_CLK isn't working to configured value of 160Mhz.

 

We have doubts if the issue is related to hw or sw. By the sw the initial function related to clock is: Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);

I attach the clock diagram and HW scheme:

sergiverdaguerelausa_2-1707906470733.png

 

sergiverdaguerelausa_1-1707906394097.png

 

Are there any way to check the transition between internal to external clock? 
A cutom board needs an additional register configuration different of EVB?

 

Thank you in advance,

 

Sergi.

 

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @sergiverdaguerelausa,

Please help me testing your custom board with the Clock_Ip_Example from the RTD package. This example initializes the clock sources, the clock tree and configure the clock gating of peripheral, as well as initializes two clock configurations with different CLKOUT_RUN_CLK frequency:

  • Clock_Ip_aClockConfig[0] with CLKOUT_RUN_CLK = 20Mhz and Clock_Ip_aClockConfig[1] with CLKOUT_RUN_CLK = 6Mhz.
  • Using Clock_Ip_GetClockFrequency to check the frequency of CLKOUT_RUN_CLK after init clock.

If this example does not work, it is probably a HW error, as a custom board does not need an additional register configuration different of EVB.

Please confirm your custom board follows the clock circuitry hardware design guidelines found under the HW Design Package.

Best regards,
Julián.

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sergiverdaguerelausa
Contributor II

Bug detected on the clock HW configuration. 
Now all works properly.

 

Thank you!

 

Sergi

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sergiverdaguerelausa
Contributor II

Hi Julián!

 

For S32K314 no there are examples.

I compared with example of S32K312 to get the same configuration and same initialisation code but the behaviour is the same. clockStatus is on CLOCK_IP_ERROR and PLL_PHI0_CLK = 0.

I will share the hardware design guidelines to hw team.

Thank you,


Sergi.

383 Views
Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @sergiverdaguerelausa,

Please help me testing your custom board with the Clock_Ip_Example from the RTD package. This example initializes the clock sources, the clock tree and configure the clock gating of peripheral, as well as initializes two clock configurations with different CLKOUT_RUN_CLK frequency:

  • Clock_Ip_aClockConfig[0] with CLKOUT_RUN_CLK = 20Mhz and Clock_Ip_aClockConfig[1] with CLKOUT_RUN_CLK = 6Mhz.
  • Using Clock_Ip_GetClockFrequency to check the frequency of CLKOUT_RUN_CLK after init clock.

If this example does not work, it is probably a HW error, as a custom board does not need an additional register configuration different of EVB.

Please confirm your custom board follows the clock circuitry hardware design guidelines found under the HW Design Package.

Best regards,
Julián.

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